interrupts.c 4.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2007 Michal Simek
  4. * (C) Copyright 2004 Atmark Techno, Inc.
  5. *
  6. * Michal SIMEK <monstr@monstr.eu>
  7. * Yasushi SHOJI <yashi@atmark-techno.com>
  8. */
  9. #include <common.h>
  10. #include <command.h>
  11. #include <fdtdec.h>
  12. #include <irq_func.h>
  13. #include <malloc.h>
  14. #include <asm/microblaze_intc.h>
  15. #include <asm/asm.h>
  16. DECLARE_GLOBAL_DATA_PTR;
  17. void enable_interrupts(void)
  18. {
  19. debug("Enable interrupts for the whole CPU\n");
  20. MSRSET(0x2);
  21. }
  22. int disable_interrupts(void)
  23. {
  24. unsigned int msr;
  25. MFS(msr, rmsr);
  26. MSRCLR(0x2);
  27. return (msr & 0x2) != 0;
  28. }
  29. static struct irq_action *vecs;
  30. static u32 irq_no;
  31. /* mapping structure to interrupt controller */
  32. microblaze_intc_t *intc;
  33. /* default handler */
  34. static void def_hdlr(void)
  35. {
  36. puts("def_hdlr\n");
  37. }
  38. static void enable_one_interrupt(int irq)
  39. {
  40. int mask;
  41. int offset = 1;
  42. offset <<= irq;
  43. mask = intc->ier;
  44. intc->ier = (mask | offset);
  45. debug("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask,
  46. intc->ier);
  47. debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
  48. intc->iar, intc->mer);
  49. }
  50. static void disable_one_interrupt(int irq)
  51. {
  52. int mask;
  53. int offset = 1;
  54. offset <<= irq;
  55. mask = intc->ier;
  56. intc->ier = (mask & ~offset);
  57. debug("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask,
  58. intc->ier);
  59. debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
  60. intc->iar, intc->mer);
  61. }
  62. int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg)
  63. {
  64. struct irq_action *act;
  65. /* irq out of range */
  66. if ((irq < 0) || (irq > irq_no)) {
  67. puts("IRQ out of range\n");
  68. return -1;
  69. }
  70. act = &vecs[irq];
  71. if (hdlr) { /* enable */
  72. act->handler = hdlr;
  73. act->arg = arg;
  74. act->count = 0;
  75. enable_one_interrupt(irq);
  76. return 0;
  77. }
  78. /* Disable */
  79. act->handler = (interrupt_handler_t *)def_hdlr;
  80. act->arg = (void *)irq;
  81. disable_one_interrupt(irq);
  82. return 1;
  83. }
  84. /* initialization interrupt controller - hardware */
  85. static void intc_init(void)
  86. {
  87. intc->mer = 0;
  88. intc->ier = 0;
  89. intc->iar = 0xFFFFFFFF;
  90. /* XIntc_Start - hw_interrupt enable and all interrupt enable */
  91. intc->mer = 0x3;
  92. debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
  93. intc->iar, intc->mer);
  94. }
  95. int interrupt_init(void)
  96. {
  97. int i;
  98. const void *blob = gd->fdt_blob;
  99. int node = 0;
  100. debug("INTC: Initialization\n");
  101. node = fdt_node_offset_by_compatible(blob, node,
  102. "xlnx,xps-intc-1.00.a");
  103. if (node != -1) {
  104. fdt_addr_t base = fdtdec_get_addr(blob, node, "reg");
  105. if (base == FDT_ADDR_T_NONE)
  106. return -1;
  107. debug("INTC: Base addr %lx\n", base);
  108. intc = (microblaze_intc_t *)base;
  109. irq_no = fdtdec_get_int(blob, node, "xlnx,num-intr-inputs", 0);
  110. debug("INTC: IRQ NO %x\n", irq_no);
  111. } else {
  112. return node;
  113. }
  114. if (irq_no) {
  115. vecs = calloc(1, sizeof(struct irq_action) * irq_no);
  116. if (vecs == NULL) {
  117. puts("Interrupt vector allocation failed\n");
  118. return -1;
  119. }
  120. /* initialize irq list */
  121. for (i = 0; i < irq_no; i++) {
  122. vecs[i].handler = (interrupt_handler_t *)def_hdlr;
  123. vecs[i].arg = (void *)i;
  124. vecs[i].count = 0;
  125. }
  126. /* initialize intc controller */
  127. intc_init();
  128. enable_interrupts();
  129. } else {
  130. puts("Undefined interrupt controller\n");
  131. }
  132. return 0;
  133. }
  134. void interrupt_handler(void)
  135. {
  136. int irqs = intc->ivr; /* find active interrupt */
  137. int mask = 1;
  138. int value;
  139. struct irq_action *act = vecs + irqs;
  140. debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
  141. intc->iar, intc->mer);
  142. #ifdef DEBUG
  143. R14(value);
  144. #endif
  145. debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
  146. debug("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
  147. (u32)act->handler, act->count, (u32)act->arg);
  148. act->handler(act->arg);
  149. act->count++;
  150. intc->iar = mask << irqs;
  151. debug("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
  152. intc->ier, intc->iar, intc->mer);
  153. #ifdef DEBUG
  154. R14(value);
  155. #endif
  156. debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
  157. }
  158. #if defined(CONFIG_CMD_IRQ)
  159. int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, const char *argv[])
  160. {
  161. int i;
  162. struct irq_action *act = vecs;
  163. if (irq_no) {
  164. puts("\nInterrupt-Information:\n\n"
  165. "Nr Routine Arg Count\n"
  166. "-----------------------------\n");
  167. for (i = 0; i < irq_no; i++) {
  168. if (act->handler != (interrupt_handler_t *)def_hdlr) {
  169. printf("%02d %08x %08x %d\n", i,
  170. (int)act->handler, (int)act->arg,
  171. act->count);
  172. }
  173. act++;
  174. }
  175. puts("\n");
  176. } else {
  177. puts("Undefined interrupt controller\n");
  178. }
  179. return 0;
  180. }
  181. #endif