spl_board_init.c 3.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015-2016 Socionext Inc.
  4. * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  5. */
  6. #include <common.h>
  7. #include <debug_uart.h>
  8. #include <hang.h>
  9. #include <spl.h>
  10. #include "init.h"
  11. #include "micro-support-card.h"
  12. #include "soc-info.h"
  13. struct uniphier_spl_initdata {
  14. unsigned int soc_id;
  15. void (*bcu_init)(const struct uniphier_board_data *bd);
  16. void (*early_clk_init)(void);
  17. int (*dpll_init)(const struct uniphier_board_data *bd);
  18. int (*memconf_init)(const struct uniphier_board_data *bd);
  19. void (*dram_clk_init)(void);
  20. int (*umc_init)(const struct uniphier_board_data *bd);
  21. };
  22. static const struct uniphier_spl_initdata uniphier_spl_initdata[] = {
  23. #if defined(CONFIG_ARCH_UNIPHIER_LD4)
  24. {
  25. .soc_id = UNIPHIER_LD4_ID,
  26. .bcu_init = uniphier_ld4_bcu_init,
  27. .early_clk_init = uniphier_ld4_early_clk_init,
  28. .dpll_init = uniphier_ld4_dpll_init,
  29. .memconf_init = uniphier_memconf_2ch_init,
  30. .dram_clk_init = uniphier_ld4_dram_clk_init,
  31. .umc_init = uniphier_ld4_umc_init,
  32. },
  33. #endif
  34. #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
  35. {
  36. .soc_id = UNIPHIER_PRO4_ID,
  37. .early_clk_init = uniphier_ld4_early_clk_init,
  38. .dpll_init = uniphier_pro4_dpll_init,
  39. .memconf_init = uniphier_memconf_2ch_init,
  40. .dram_clk_init = uniphier_ld4_dram_clk_init,
  41. .umc_init = uniphier_pro4_umc_init,
  42. },
  43. #endif
  44. #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
  45. {
  46. .soc_id = UNIPHIER_SLD8_ID,
  47. .bcu_init = uniphier_ld4_bcu_init,
  48. .early_clk_init = uniphier_ld4_early_clk_init,
  49. .dpll_init = uniphier_sld8_dpll_init,
  50. .memconf_init = uniphier_memconf_2ch_init,
  51. .dram_clk_init = uniphier_ld4_dram_clk_init,
  52. .umc_init = uniphier_sld8_umc_init,
  53. },
  54. #endif
  55. #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
  56. {
  57. .soc_id = UNIPHIER_PRO5_ID,
  58. .early_clk_init = uniphier_ld4_early_clk_init,
  59. .dpll_init = uniphier_pro5_dpll_init,
  60. .memconf_init = uniphier_memconf_2ch_init,
  61. .dram_clk_init = uniphier_pro5_dram_clk_init,
  62. .umc_init = uniphier_pro5_umc_init,
  63. },
  64. #endif
  65. #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
  66. {
  67. .soc_id = UNIPHIER_PXS2_ID,
  68. .early_clk_init = uniphier_ld4_early_clk_init,
  69. .dpll_init = uniphier_pxs2_dpll_init,
  70. .memconf_init = uniphier_memconf_3ch_init,
  71. .dram_clk_init = uniphier_pxs2_dram_clk_init,
  72. .umc_init = uniphier_pxs2_umc_init,
  73. },
  74. #endif
  75. #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
  76. {
  77. .soc_id = UNIPHIER_LD6B_ID,
  78. .early_clk_init = uniphier_ld4_early_clk_init,
  79. .dpll_init = uniphier_pxs2_dpll_init,
  80. .memconf_init = uniphier_memconf_3ch_init,
  81. .dram_clk_init = uniphier_pxs2_dram_clk_init,
  82. .umc_init = uniphier_pxs2_umc_init,
  83. },
  84. #endif
  85. };
  86. UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_spl_initdata, uniphier_spl_initdata)
  87. void spl_board_init(void)
  88. {
  89. const struct uniphier_board_data *bd;
  90. const struct uniphier_spl_initdata *initdata;
  91. int ret;
  92. #ifdef CONFIG_DEBUG_UART
  93. debug_uart_init();
  94. #endif
  95. bd = uniphier_get_board_param();
  96. if (!bd)
  97. hang();
  98. initdata = uniphier_get_spl_initdata();
  99. if (!initdata)
  100. hang();
  101. if (initdata->bcu_init)
  102. initdata->bcu_init(bd);
  103. initdata->early_clk_init();
  104. preloader_console_init();
  105. ret = initdata->dpll_init(bd);
  106. if (ret) {
  107. pr_err("failed to init DPLL\n");
  108. hang();
  109. }
  110. ret = initdata->memconf_init(bd);
  111. if (ret) {
  112. pr_err("failed to init MEMCONF\n");
  113. hang();
  114. }
  115. initdata->dram_clk_init();
  116. ret = initdata->umc_init(bd);
  117. if (ret) {
  118. pr_err("failed to init DRAM\n");
  119. hang();
  120. }
  121. }