t4240rdb.c 3.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2014 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <command.h>
  7. #include <env.h>
  8. #include <fdt_support.h>
  9. #include <i2c.h>
  10. #include <image.h>
  11. #include <init.h>
  12. #include <netdev.h>
  13. #include <linux/compiler.h>
  14. #include <asm/mmu.h>
  15. #include <asm/processor.h>
  16. #include <asm/cache.h>
  17. #include <asm/immap_85xx.h>
  18. #include <asm/fsl_law.h>
  19. #include <asm/fsl_serdes.h>
  20. #include <asm/fsl_liodn.h>
  21. #include <fm_eth.h>
  22. #include "t4rdb.h"
  23. #include "cpld.h"
  24. #include "../common/vid.h"
  25. DECLARE_GLOBAL_DATA_PTR;
  26. int checkboard(void)
  27. {
  28. struct cpu_type *cpu = gd->arch.cpu;
  29. u8 sw;
  30. printf("Board: %sRDB, ", cpu->name);
  31. printf("Board rev: 0x%02x CPLD ver: 0x%02x%02x, ",
  32. CPLD_READ(hw_ver), CPLD_READ(sw_maj_ver), CPLD_READ(sw_min_ver));
  33. sw = CPLD_READ(vbank);
  34. sw = sw & CPLD_BANK_SEL_MASK;
  35. if (sw <= 7)
  36. printf("vBank: %d\n", sw);
  37. else
  38. printf("Unsupported Bank=%x\n", sw);
  39. puts("SERDES Reference Clocks:\n");
  40. printf(" SERDES1=100MHz SERDES2=156.25MHz\n"
  41. " SERDES3=100MHz SERDES4=100MHz\n");
  42. return 0;
  43. }
  44. int board_early_init_r(void)
  45. {
  46. const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
  47. int flash_esel = find_tlb_idx((void *)flashbase, 1);
  48. /*
  49. * Remap Boot flash + PROMJET region to caching-inhibited
  50. * so that flash can be erased properly.
  51. */
  52. /* Flush d-cache and invalidate i-cache of any FLASH data */
  53. flush_dcache();
  54. invalidate_icache();
  55. if (flash_esel == -1) {
  56. /* very unlikely unless something is messed up */
  57. puts("Error: Could not find TLB for FLASH BASE\n");
  58. flash_esel = 2; /* give our best effort to continue */
  59. } else {
  60. /* invalidate existing TLB entry for flash + promjet */
  61. disable_tlb(flash_esel);
  62. }
  63. set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
  64. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  65. 0, flash_esel, BOOKE_PAGESZ_256M, 1);
  66. /*
  67. * Adjust core voltage according to voltage ID
  68. * This function changes I2C mux to channel 2.
  69. */
  70. if (adjust_vdd(0))
  71. printf("Warning: Adjusting core voltage failed.\n");
  72. return 0;
  73. }
  74. int misc_init_r(void)
  75. {
  76. return 0;
  77. }
  78. int ft_board_setup(void *blob, bd_t *bd)
  79. {
  80. phys_addr_t base;
  81. phys_size_t size;
  82. ft_cpu_setup(blob, bd);
  83. base = env_get_bootm_low();
  84. size = env_get_bootm_size();
  85. fdt_fixup_memory(blob, (u64)base, (u64)size);
  86. #ifdef CONFIG_PCI
  87. pci_of_setup(blob, bd);
  88. #endif
  89. fdt_fixup_liodn(blob);
  90. fsl_fdt_fixup_dr_usb(blob, bd);
  91. #ifdef CONFIG_SYS_DPAA_FMAN
  92. #ifndef CONFIG_DM_ETH
  93. fdt_fixup_fman_ethernet(blob);
  94. #endif
  95. fdt_fixup_board_enet(blob);
  96. #endif
  97. return 0;
  98. }
  99. /*
  100. * This function is called by bdinfo to print detail board information.
  101. * As an exmaple for future board, we organize the messages into
  102. * several sections. If applicable, the message is in the format of
  103. * <name> = <value>
  104. * It should aligned with normal output of bdinfo command.
  105. *
  106. * Voltage: Core, DDR and another configurable voltages
  107. * Clock : Critical clocks which are not printed already
  108. * RCW : RCW source if not printed already
  109. * Misc : Other important information not in above catagories
  110. */
  111. void board_detail(void)
  112. {
  113. int rcwsrc;
  114. /* RCW section SW3[4] */
  115. rcwsrc = 0x0;
  116. puts("RCW source = ");
  117. switch (rcwsrc & 0x1) {
  118. case 0x1:
  119. puts("SDHC/eMMC\n");
  120. break;
  121. default:
  122. puts("I2C normal addressing\n");
  123. break;
  124. }
  125. }