// SPDX-License-Identifier: (GPL-2.0+ OR MIT) // // Copyright (C) 2020 PHYTEC Messtechnik GmbH // Author: Jens Lang // Copyright (C) 2021 Fabio Estevam /dts-v1/; #include "imx7d.dtsi" / { model = "Storopack SMEGW01 board"; compatible = "storopack,imx7d-smegw01", "fsl,imx7d"; aliases { mmc0 = &usdhc1; mmc1 = &usdhc3; }; chosen { stdout-path = &uart1; }; memory@80000000 { device_type = "memory"; reg = <0x80000000 0x20000000>; }; }; &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet1>; assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, <&clks IMX7D_ENET1_TIME_ROOT_CLK>; assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; assigned-clock-rates = <0>, <100000000>; phy-mode = "rgmii-id"; phy-handle = <ðphy0>; fsl,magic-packet; status = "okay"; mdio: mdio { #address-cells = <1>; #size-cells = <0>; ethphy0: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; }; }; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; no-1-8-v; enable-sdio-wakeup; keep-power-in-suspend; status = "okay"; }; &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-1 = <&pinctrl_usdhc3_100mhz>; pinctrl-2 = <&pinctrl_usdhc3_200mhz>; assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; assigned-clock-rates = <400000000>; max-frequency = <200000000>; bus-width = <8>; fsl,tuning-step = <1>; non-removable; cap-sd-highspeed; cap-mmc-highspeed; cap-mmc-hw-reset; mmc-hs200-1_8v; mmc-ddr-1_8v; sd-uhs-ddr50; sd-uhs-sdr104; status = "okay"; }; &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>; fsl,ext-reset-output; status = "okay"; }; &iomuxc { pinctrl_enet1: enet1grp { fsl,pins = < MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x5 MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x5 MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x5 MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x5 MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x5 MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x5 MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x5 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x5 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x5 MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x5 MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x5 MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x5 MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x7 MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x7 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x74 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x7c >; }; pinctrl_usdhc1: usdhc1 { fsl,pins = < MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 MX7D_PAD_SD1_CMD__SD1_CMD 0x59 MX7D_PAD_SD1_CLK__SD1_CLK 0x19 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 >; }; pinctrl_usdhc3: usdhc3 { fsl,pins = < MX7D_PAD_SD3_CMD__SD3_CMD 0x5d MX7D_PAD_SD3_CLK__SD3_CLK 0x1d MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5d MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5d MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5d MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5d MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5d MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5d MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5d MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5d MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1d >; }; pinctrl_usdhc3_100mhz: usdhc3_100mhz { fsl,pins = < MX7D_PAD_SD3_CMD__SD3_CMD 0x5e MX7D_PAD_SD3_CLK__SD3_CLK 0x1e MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5e MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5e MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5e MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5e MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5e MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5e MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5e MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5e MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1e >; }; pinctrl_usdhc3_200mhz: usdhc3_200mhz { fsl,pins = < MX7D_PAD_SD3_CMD__SD3_CMD 0x5f MX7D_PAD_SD3_CLK__SD3_CLK 0x0f MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5f MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5f MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5f MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5f MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5f MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5f MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5f MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5f MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1f >; }; }; &iomuxc_lpsr { pinctrl_wdog: wdoggrp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 >; }; };