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@@ -0,0 +1,19 @@
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+/* SPDX-License-Identifier: GPL-2.0 */
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+/*
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+ * Copyright (C) 2020 Sifive, Inc.
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+ * Author: Sagar Kadam <sagar.kadam@sifive.com>
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+ */
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+
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+#ifndef __DT_BINDINGS_RESET_SIFIVE_FU540_PRCI_H
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+#define __DT_BINDINGS_RESET_SIFIVE_FU540_PRCI_H
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+
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+/* Reset indexes for use by device tree data and the PRCI driver */
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+#define PRCI_RST_DDR_CTRL_N 0
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+#define PRCI_RST_DDR_AXI_N 1
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+#define PRCI_RST_DDR_AHB_N 2
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+#define PRCI_RST_DDR_PHY_N 3
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+/* bit 4 is reserved bit */
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+#define PRCI_RST_RSVD_N 4
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+#define PRCI_RST_GEMGXL_N 5
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+
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+#endif
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