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@@ -0,0 +1,122 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/**
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+ * cdns-platform.c - Platform driver for Cadence UFSHCI device
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+ *
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+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
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+ */
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+
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+#include <clk.h>
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+#include <common.h>
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+#include <dm.h>
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+#include <ufs.h>
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+
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+#include "ufs.h"
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+
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+#define USEC_PER_SEC 1000000L
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+
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+#define CDNS_UFS_REG_HCLKDIV 0xFC
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+#define CDNS_UFS_REG_PHY_XCFGD1 0x113C
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+
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+static int cdns_ufs_link_startup_notify(struct ufs_hba *hba,
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+ enum ufs_notify_change_status status)
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+{
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+ hba->quirks |= UFSHCD_QUIRK_BROKEN_LCC;
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+ switch (status) {
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+ case PRE_CHANGE:
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+ return ufshcd_dme_set(hba,
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+ UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE),
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+ 0);
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+ case POST_CHANGE:
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+ ;
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+ }
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+
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+ return 0;
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+}
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+
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+static int cdns_ufs_set_hclkdiv(struct ufs_hba *hba)
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+{
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+ struct clk clk;
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+ unsigned long core_clk_rate = 0;
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+ u32 core_clk_div = 0;
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+ int ret;
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+
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+ ret = clk_get_by_name(hba->dev, "core_clk", &clk);
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+ if (ret) {
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+ dev_err(hba->dev, "failed to get core_clk clock\n");
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+ return ret;
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+ }
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+
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+ core_clk_rate = clk_get_rate(&clk);
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+ if (IS_ERR_VALUE(core_clk_rate)) {
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+ dev_err(hba->dev, "%s: unable to find core_clk rate\n",
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+ __func__);
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+ return core_clk_rate;
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+ }
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+
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+ core_clk_div = core_clk_rate / USEC_PER_SEC;
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+ ufshcd_writel(hba, core_clk_div, CDNS_UFS_REG_HCLKDIV);
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+
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+ return 0;
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+}
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+
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+static int cdns_ufs_hce_enable_notify(struct ufs_hba *hba,
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+ enum ufs_notify_change_status status)
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+{
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+ switch (status) {
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+ case PRE_CHANGE:
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+ return cdns_ufs_set_hclkdiv(hba);
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+ case POST_CHANGE:
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+ ;
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+ }
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+
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+ return 0;
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+}
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+
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+static int cdns_ufs_init(struct ufs_hba *hba)
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+{
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+ u32 data;
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+
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+ /* Increase RX_Advanced_Min_ActivateTime_Capability */
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+ data = ufshcd_readl(hba, CDNS_UFS_REG_PHY_XCFGD1);
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+ data |= BIT(24);
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+ ufshcd_writel(hba, data, CDNS_UFS_REG_PHY_XCFGD1);
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+
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+ return 0;
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+}
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+
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+static struct ufs_hba_ops cdns_pltfm_hba_ops = {
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+ .init = cdns_ufs_init,
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+ .hce_enable_notify = cdns_ufs_hce_enable_notify,
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+ .link_startup_notify = cdns_ufs_link_startup_notify,
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+};
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+
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+static int cdns_ufs_pltfm_probe(struct udevice *dev)
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+{
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+ int err = ufshcd_probe(dev, &cdns_pltfm_hba_ops);
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+ if (err)
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+ dev_err(dev, "ufshcd_probe() failed %d\n", err);
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+
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+ return err;
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+}
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+
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+static int cdns_ufs_pltfm_bind(struct udevice *dev)
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+{
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+ struct udevice *scsi_dev;
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+
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+ return ufs_scsi_bind(dev, &scsi_dev);
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+}
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+
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+static const struct udevice_id cdns_ufs_pltfm_ids[] = {
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+ {
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+ .compatible = "cdns,ufshc-m31-16nm",
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+ },
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+ {},
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+};
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+
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+U_BOOT_DRIVER(cdns_ufs_pltfm) = {
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+ .name = "cdns-ufs-pltfm",
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+ .id = UCLASS_UFS,
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+ .of_match = cdns_ufs_pltfm_ids,
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+ .probe = cdns_ufs_pltfm_probe,
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+ .bind = cdns_ufs_pltfm_bind,
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+};
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