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@@ -28,13 +28,17 @@
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#define GPIO_EDGLEVEL 0x24 /* Edge/level Select Register */
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#define GPIO_FILONOFF 0x28 /* Chattering Prevention On/Off Register */
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#define GPIO_BOTHEDGE 0x4c /* One Edge/Both Edge Select Register */
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+#define GPIO_INEN 0x50 /* General Input Enable Register */
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#define RCAR_MAX_GPIO_PER_BANK 32
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+#define RCAR_GPIO_HAS_INEN BIT(0)
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+
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DECLARE_GLOBAL_DATA_PTR;
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struct rcar_gpio_priv {
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void __iomem *regs;
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+ u32 quirks;
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int pfc_offset;
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};
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@@ -81,6 +85,14 @@ static void rcar_gpio_set_direction(struct udevice *dev, unsigned offset,
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/* Configure postive logic in POSNEG */
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clrbits_le32(regs + GPIO_POSNEG, BIT(offset));
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+ /* Select "Input Enable/Disable" in INEN */
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+ if (priv->quirks & RCAR_GPIO_HAS_INEN) {
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+ if (output)
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+ clrbits_le32(regs + GPIO_INEN, BIT(offset));
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+ else
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+ setbits_le32(regs + GPIO_INEN, BIT(offset));
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+ }
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+
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/* Select "General Input/Output Mode" in IOINTSEL */
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clrbits_le32(regs + GPIO_IOINTSEL, BIT(offset));
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@@ -149,6 +161,7 @@ static int rcar_gpio_probe(struct udevice *dev)
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int ret;
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priv->regs = dev_read_addr_ptr(dev);
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+ priv->quirks = dev_get_driver_data(dev);
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uc_priv->bank_name = dev->name;
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ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, node, "gpio-ranges",
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@@ -179,6 +192,7 @@ static const struct udevice_id rcar_gpio_ids[] = {
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{ .compatible = "renesas,gpio-r8a77970" },
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{ .compatible = "renesas,gpio-r8a77990" },
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{ .compatible = "renesas,gpio-r8a77995" },
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+ { .compatible = "renesas,gpio-r8a779a0", .data = RCAR_GPIO_HAS_INEN },
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{ .compatible = "renesas,rcar-gen2-gpio" },
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{ .compatible = "renesas,rcar-gen3-gpio" },
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{ /* sentinel */ }
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