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@@ -43,6 +43,7 @@ int board_ddr_power_init(enum ddr_type ddr_type)
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struct udevice *dev;
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bool buck3_at_1800000v = false;
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int ret;
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+ u32 buck2;
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ret = uclass_get_device_by_driver(UCLASS_PMIC,
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DM_GET_DRIVER(pmic_stpmic1), &dev);
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@@ -102,8 +103,10 @@ int board_ddr_power_init(enum ddr_type ddr_type)
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break;
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- case STM32MP_LPDDR2:
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- case STM32MP_LPDDR3:
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+ case STM32MP_LPDDR2_16:
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+ case STM32MP_LPDDR2_32:
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+ case STM32MP_LPDDR3_16:
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+ case STM32MP_LPDDR3_32:
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/*
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* configure VDD_DDR1 = LDO3
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* Set LDO3 to 1.8V
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@@ -133,11 +136,23 @@ int board_ddr_power_init(enum ddr_type ddr_type)
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if (ret < 0)
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return ret;
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- /* VDD_DDR2 : Set BUCK2 to 1.2V */
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+ /* VDD_DDR2 : Set BUCK2 to 1.2V (16bits) or 1.25V (32 bits)*/
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+ switch (ddr_type) {
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+ case STM32MP_LPDDR2_32:
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+ case STM32MP_LPDDR3_32:
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+ buck2 = STPMIC1_BUCK2_1250000V;
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+ break;
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+ default:
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+ case STM32MP_LPDDR2_16:
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+ case STM32MP_LPDDR3_16:
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+ buck2 = STPMIC1_BUCK2_1200000V;
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+ break;
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+ }
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+
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ret = pmic_clrsetbits(dev,
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STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK2),
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STPMIC1_BUCK_VOUT_MASK,
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- STPMIC1_BUCK2_1200000V);
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+ buck2);
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if (ret < 0)
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return ret;
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