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@@ -64,6 +64,14 @@ config SPL_SYS_DCACHE_OFF
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help
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Do not enable data cache in SPL.
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+config SPL_ZERO_MEM_BEFORE_USE
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+ bool "Zero memory before use"
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+ depends on SPL
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+ default n
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+ help
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+ Zero stack/GD/malloc area in SPL before using them, this is needed for
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+ Sifive core devices that uses L2 cache to store SPL.
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+
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# board-specific options below
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source "board/AndesTech/ae350/Kconfig"
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source "board/emulation/qemu-riscv/Kconfig"
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