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@@ -12,6 +12,7 @@
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* the License, or (at your option) any later version.
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*/
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+#include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
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#include <dt-bindings/power/xlnx-zynqmp-power.h>
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#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
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@@ -160,11 +161,25 @@
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mbox-names = "tx", "rx";
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};
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+ nvmem_firmware {
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+ compatible = "xlnx,zynqmp-nvmem-fw";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ soc_revision: soc_revision@0 {
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+ reg = <0x0 0x4>;
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+ };
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+ };
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+
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zynqmp_pcap: pcap {
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compatible = "xlnx,zynqmp-pcap-fpga";
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clock-names = "ref_clk";
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};
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+ xlnx_aes: zynqmp-aes {
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+ compatible = "xlnx,zynqmp-aes";
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+ };
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+
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zynqmp_reset: reset-controller {
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compatible = "xlnx,zynqmp-reset";
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#reset-cells = <1>;
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@@ -198,16 +213,6 @@
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ranges;
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};
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- nvmem_firmware {
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- compatible = "xlnx,zynqmp-nvmem-fw";
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- #address-cells = <1>;
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- #size-cells = <1>;
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-
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- soc_revision: soc_revision@0 {
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- reg = <0x0 0x4>;
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- };
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- };
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-
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amba: axi {
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compatible = "simple-bus";
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u-boot,dm-pre-reloc;
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@@ -501,8 +506,8 @@
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interrupts = <0 112 4>;
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};
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- nand0: nand@ff100000 {
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- compatible = "arasan,nfc-v3p10";
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+ nand0: nand-controller@ff100000 {
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+ compatible = "xlnx,zynqmp-nand-controller", "arasan,nfc-v3p10";
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status = "disabled";
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reg = <0x0 0xff100000 0x0 0x1000>;
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clock-names = "controller", "bus";
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@@ -667,6 +672,15 @@
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power-domains = <&zynqmp_firmware PD_QSPI>;
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};
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+ psgtr: phy@fd400000 {
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+ compatible = "xlnx,zynqmp-psgtr-v1.1";
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+ status = "disabled";
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+ reg = <0x0 0xfd400000 0x0 0x40000>,
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+ <0x0 0xfd3d0000 0x0 0x1000>;
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+ reg-names = "serdes", "siou";
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+ #phy-cells = <4>;
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+ };
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+
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rtc: rtc@ffa60000 {
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compatible = "xlnx,zynqmp-rtc";
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status = "disabled";
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@@ -677,45 +691,6 @@
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calibration = <0x8000>;
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};
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- serdes: zynqmp_phy@fd400000 {
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- compatible = "xlnx,zynqmp-psgtr";
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- status = "disabled";
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- reg = <0x0 0xfd400000 0x0 0x40000>,
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- <0x0 0xfd3d0000 0x0 0x1000>,
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- <0x0 0xff5e0000 0x0 0x1000>;
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- reg-names = "serdes", "siou", "lpd";
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- nvmem-cells = <&soc_revision>;
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- nvmem-cell-names = "soc_revision";
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- resets = <&zynqmp_reset ZYNQMP_RESET_SATA>,
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- <&zynqmp_reset ZYNQMP_RESET_USB0_CORERESET>,
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- <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>,
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- <&zynqmp_reset ZYNQMP_RESET_USB0_HIBERRESET>,
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- <&zynqmp_reset ZYNQMP_RESET_USB1_HIBERRESET>,
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- <&zynqmp_reset ZYNQMP_RESET_USB0_APB>,
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- <&zynqmp_reset ZYNQMP_RESET_USB1_APB>,
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- <&zynqmp_reset ZYNQMP_RESET_DP>,
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- <&zynqmp_reset ZYNQMP_RESET_GEM0>,
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- <&zynqmp_reset ZYNQMP_RESET_GEM1>,
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- <&zynqmp_reset ZYNQMP_RESET_GEM2>,
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- <&zynqmp_reset ZYNQMP_RESET_GEM3>;
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- reset-names = "sata_rst", "usb0_crst", "usb1_crst",
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- "usb0_hibrst", "usb1_hibrst", "usb0_apbrst",
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- "usb1_apbrst", "dp_rst", "gem0_rst",
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- "gem1_rst", "gem2_rst", "gem3_rst";
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- lane0: lane0 {
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- #phy-cells = <4>;
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- };
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- lane1: lane1 {
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- #phy-cells = <4>;
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- };
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- lane2: lane2 {
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- #phy-cells = <4>;
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- };
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- lane3: lane3 {
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- #phy-cells = <4>;
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- };
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- };
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-
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sata: ahci@fd0c0000 {
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compatible = "ceva,ahci-1v84";
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status = "disabled";
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@@ -740,11 +715,11 @@
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xlnx,device_id = <0>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x870>;
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- power-domains = <&zynqmp_firmware PD_SD_0>;
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nvmem-cells = <&soc_revision>;
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nvmem-cell-names = "soc_revision";
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#clock-cells = <1>;
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clock-output-names = "clk_out_sd0", "clk_in_sd0";
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+ power-domains = <&zynqmp_firmware PD_SD_0>;
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};
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sdhci1: mmc@ff170000 {
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@@ -758,11 +733,11 @@
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xlnx,device_id = <1>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x871>;
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- power-domains = <&zynqmp_firmware PD_SD_1>;
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nvmem-cells = <&soc_revision>;
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nvmem-cell-names = "soc_revision";
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#clock-cells = <1>;
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clock-output-names = "clk_out_sd1", "clk_in_sd1";
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+ power-domains = <&zynqmp_firmware PD_SD_1>;
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};
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smmu: iommu@fd800000 {
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@@ -962,37 +937,18 @@
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};
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};
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- xlnx_dpdma: dma@fd4c0000 {
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- compatible = "xlnx,dpdma";
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+ zynqmp_dpdma: dma-controller@fd4c0000 {
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+ compatible = "xlnx,zynqmp-dpdma";
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status = "disabled";
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reg = <0x0 0xfd4c0000 0x0 0x1000>;
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interrupts = <0 122 4>;
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interrupt-parent = <&gic>;
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clock-names = "axi_clk";
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power-domains = <&zynqmp_firmware PD_DP>;
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- dma-channels = <6>;
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#dma-cells = <1>;
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- dma-video0channel {
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- compatible = "xlnx,video0";
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- };
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- dma-video1channel {
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- compatible = "xlnx,video1";
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- };
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- dma-video2channel {
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- compatible = "xlnx,video2";
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- };
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- dma-graphicschannel {
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- compatible = "xlnx,graphics";
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- };
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- dma-audio0channel {
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- compatible = "xlnx,audio0";
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- };
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- dma-audio1channel {
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- compatible = "xlnx,audio1";
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- };
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};
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- zynqmp_dpsub: zynqmp-display@fd4a0000 {
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+ zynqmp_dpsub: display@fd4a0000 {
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compatible = "xlnx,zynqmp-dpsub-1.7";
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status = "disabled";
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reg = <0x0 0xfd4a0000 0x0 0x1000>,
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@@ -1002,51 +958,15 @@
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reg-names = "dp", "blend", "av_buf", "aud";
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interrupts = <0 119 4>;
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interrupt-parent = <&gic>;
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-
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clock-names = "dp_apb_clk", "dp_aud_clk",
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"dp_vtc_pixel_clk_in";
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-
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power-domains = <&zynqmp_firmware PD_DP>;
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-
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- vid-layer {
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- dma-names = "vid0", "vid1", "vid2";
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- dmas = <&xlnx_dpdma 0>,
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- <&xlnx_dpdma 1>,
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- <&xlnx_dpdma 2>;
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- };
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-
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- gfx-layer {
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- dma-names = "gfx0";
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- dmas = <&xlnx_dpdma 3>;
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- };
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-
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- /* dummy node to indicate there's no child i2c device */
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- i2c-bus {
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- };
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-
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- zynqmp_dp_snd_codec0: zynqmp_dp_snd_codec0 {
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- compatible = "xlnx,dp-snd-codec";
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- clock-names = "aud_clk";
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- };
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-
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- zynqmp_dp_snd_pcm0: zynqmp_dp_snd_pcm0 {
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- compatible = "xlnx,dp-snd-pcm";
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- dmas = <&xlnx_dpdma 4>;
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- dma-names = "tx";
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- };
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-
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- zynqmp_dp_snd_pcm1: zynqmp_dp_snd_pcm1 {
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- compatible = "xlnx,dp-snd-pcm";
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- dmas = <&xlnx_dpdma 5>;
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- dma-names = "tx";
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- };
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-
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- zynqmp_dp_snd_card0: zynqmp_dp_snd_card {
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- compatible = "xlnx,dp-snd-card";
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- xlnx,dp-snd-pcm = <&zynqmp_dp_snd_pcm0>,
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- <&zynqmp_dp_snd_pcm1>;
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- xlnx,dp-snd-codec = <&zynqmp_dp_snd_codec0>;
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- };
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+ resets = <&zynqmp_reset ZYNQMP_RESET_DP>;
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+ dma-names = "vid0", "vid1", "vid2", "gfx0";
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+ dmas = <&zynqmp_dpdma ZYNQMP_DPDMA_VIDEO0>,
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+ <&zynqmp_dpdma ZYNQMP_DPDMA_VIDEO1>,
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+ <&zynqmp_dpdma ZYNQMP_DPDMA_VIDEO2>,
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+ <&zynqmp_dpdma ZYNQMP_DPDMA_GRAPHICS>;
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};
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};
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};
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