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@@ -36,6 +36,10 @@ DECLARE_GLOBAL_DATA_PTR;
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(COMPHY_CALLER_UBOOT | ((pcie_width) << 18) | \
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((clk_src) << 17) | COMPHY_FW_FORMAT(mode, 0, speeds))
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+/* Invert polarity are bits 1-0 of the mode */
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+#define COMPHY_FW_SATA_FORMAT(mode, invert) \
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+ ((invert) | COMPHY_FW_MODE_FORMAT(mode))
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+
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#define COMPHY_SATA_MODE 0x1
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#define COMPHY_SGMII_MODE 0x2 /* SGMII 1G */
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#define COMPHY_HS_SGMII_MODE 0x3 /* SGMII 2.5G */
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@@ -607,7 +611,8 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,
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break;
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case COMPHY_TYPE_SATA0:
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case COMPHY_TYPE_SATA1:
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- mode = COMPHY_FW_MODE_FORMAT(COMPHY_SATA_MODE);
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+ mode = COMPHY_FW_SATA_FORMAT(COMPHY_SATA_MODE,
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+ serdes_map[lane].invert);
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ret = comphy_sata_power_up(lane, hpipe_base_addr,
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comphy_base_addr,
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ptr_chip_cfg->cp_index,
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