|
@@ -353,6 +353,18 @@ config SYS_DISABLE_DCACHE_OPS
|
|
|
Note that, its up to the individual architectures to implement
|
|
|
this functionality.
|
|
|
|
|
|
+config SYS_IMMR
|
|
|
+ hex
|
|
|
+ depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
|
|
|
+ default 0xFF000000 if MPC8xx
|
|
|
+ default 0xF0000000 if ARCH_MPC8313
|
|
|
+ default 0xE0000000 if MPC83xx && !ARCH_MPC8313
|
|
|
+ default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
|
|
|
+ default SYS_CCSRBAR_DEFAULT
|
|
|
+ help
|
|
|
+ Address for the Internal Memory-Mapped Registers (IMMR) window used
|
|
|
+ to configure the features of many Freescale / NXP SoCs.
|
|
|
+
|
|
|
config SKIP_LOWLEVEL_INIT
|
|
|
bool "Skip the calls to certain low level initialization functions"
|
|
|
depends on ARM || NDS32 || MIPS || RISCV
|