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@@ -41,3 +41,6 @@ Example: Bundles both peripheral bitstream and core bitstream into FIT image
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resets = <&rst FPGAMGR_RESET>;
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altr,bitstream = "fit_spl_fpga.itb";
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};
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+
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+- The .its related documentations can be found here
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+ - Appendix - Reducing Arria 10 Fabric Configuration Time - https://rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10
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