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@@ -27,6 +27,21 @@
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#define RK808_BUCK4_VSEL_MASK 0xf
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#define RK808_LDO_VSEL_MASK 0x1f
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+/* RK817 BUCK */
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+#define RK817_BUCK_ON_VSEL(n) (0xbb + 3 * ((n) - 1))
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+#define RK817_BUCK_SLP_VSEL(n) (0xbc + 3 * ((n) - 1))
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+#define RK817_BUCK_VSEL_MASK 0x7f
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+#define RK817_BUCK_CONFIG(i) (0xba + (i) * 3)
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+
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+/* RK817 LDO */
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+#define RK817_LDO_ON_VSEL(n) (0xcc + 2 * ((n) - 1))
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+#define RK817_LDO_SLP_VSEL(n) (0xcd + 2 * ((n) - 1))
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+#define RK817_LDO_VSEL_MASK 0x7f
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+
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+/* RK817 ENABLE */
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+#define RK817_POWER_EN(n) (0xb1 + (n))
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+#define RK817_POWER_SLP_EN(n) (0xb5 + (n))
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+
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#define RK818_BUCK_VSEL_MASK 0x3f
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#define RK818_BUCK4_VSEL_MASK 0x1f
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#define RK818_LDO_VSEL_MASK 0x1f
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@@ -45,13 +60,19 @@
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#define RK805_RAMP_RATE_12_5MV_PER_US (2 << RK805_RAMP_RATE_OFFSET)
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#define RK805_RAMP_RATE_25MV_PER_US (3 << RK805_RAMP_RATE_OFFSET)
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#define RK808_RAMP_RATE_OFFSET 3
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-
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#define RK808_RAMP_RATE_MASK (3 << RK808_RAMP_RATE_OFFSET)
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#define RK808_RAMP_RATE_2MV_PER_US (0 << RK808_RAMP_RATE_OFFSET)
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#define RK808_RAMP_RATE_4MV_PER_US (1 << RK808_RAMP_RATE_OFFSET)
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#define RK808_RAMP_RATE_6MV_PER_US (2 << RK808_RAMP_RATE_OFFSET)
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#define RK808_RAMP_RATE_10MV_PER_US (3 << RK808_RAMP_RATE_OFFSET)
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+#define RK817_RAMP_RATE_OFFSET 6
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+#define RK817_RAMP_RATE_MASK (0x3 << RK817_RAMP_RATE_OFFSET)
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+#define RK817_RAMP_RATE_3MV_PER_US (0x0 << RK817_RAMP_RATE_OFFSET)
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+#define RK817_RAMP_RATE_6_3MV_PER_US (0x1 << RK817_RAMP_RATE_OFFSET)
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+#define RK817_RAMP_RATE_12_5MV_PER_US (0x2 << RK817_RAMP_RATE_OFFSET)
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+#define RK817_RAMP_RATE_25MV_PER_US (0x3 << RK817_RAMP_RATE_OFFSET)
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+
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struct rk8xx_reg_info {
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uint min_uv;
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uint step_uv;
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@@ -84,6 +105,25 @@ static const struct rk8xx_reg_info rk816_buck[] = {
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{ 800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
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};
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+static const struct rk8xx_reg_info rk817_buck[] = {
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+ /* buck 1 */
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+ { 500000, 12500, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x00, },
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+ { 1500000, 100000, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x50, },
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+ { 2400000, 0, RK817_BUCK_ON_VSEL(1), RK817_BUCK_SLP_VSEL(1), RK817_BUCK_CONFIG(1), RK817_BUCK_VSEL_MASK, 0x59, },
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+ /* buck 2 */
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+ { 500000, 12500, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x00, },
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+ { 1500000, 100000, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x50, },
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+ { 2400000, 0, RK817_BUCK_ON_VSEL(2), RK817_BUCK_SLP_VSEL(2), RK817_BUCK_CONFIG(2), RK817_BUCK_VSEL_MASK, 0x59, },
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+ /* buck 3 */
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+ { 500000, 12500, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x00, },
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+ { 1500000, 100000, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x50, },
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+ { 2400000, 0, RK817_BUCK_ON_VSEL(3), RK817_BUCK_SLP_VSEL(3), RK817_BUCK_CONFIG(3), RK817_BUCK_VSEL_MASK, 0x59, },
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+ /* buck 4 */
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+ { 500000, 12500, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x00, },
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+ { 1500000, 100000, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x50, },
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+ { 3400000, 0, RK817_BUCK_ON_VSEL(4), RK817_BUCK_SLP_VSEL(4), RK817_BUCK_CONFIG(4), RK817_BUCK_VSEL_MASK, 0x63, },
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+};
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+
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static const struct rk8xx_reg_info rk818_buck[] = {
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{ 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, },
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{ 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, },
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@@ -112,6 +152,36 @@ static const struct rk8xx_reg_info rk816_ldo[] = {
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{ 800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
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};
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+static const struct rk8xx_reg_info rk817_ldo[] = {
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+ /* ldo1 */
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+ { 600000, 25000, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), NA, RK817_LDO_VSEL_MASK, 0x00, },
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+ { 3400000, 0, RK817_LDO_ON_VSEL(1), RK817_LDO_SLP_VSEL(1), NA, RK817_LDO_VSEL_MASK, 0x70, },
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+ /* ldo2 */
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+ { 600000, 25000, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), NA, RK817_LDO_VSEL_MASK, 0x00, },
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+ { 3400000, 0, RK817_LDO_ON_VSEL(2), RK817_LDO_SLP_VSEL(2), NA, RK817_LDO_VSEL_MASK, 0x70, },
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+ /* ldo3 */
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+ { 600000, 25000, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), NA, RK817_LDO_VSEL_MASK, 0x00, },
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+ { 3400000, 0, RK817_LDO_ON_VSEL(3), RK817_LDO_SLP_VSEL(3), NA, RK817_LDO_VSEL_MASK, 0x70, },
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+ /* ldo4 */
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+ { 600000, 25000, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), NA, RK817_LDO_VSEL_MASK, 0x00, },
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+ { 3400000, 0, RK817_LDO_ON_VSEL(4), RK817_LDO_SLP_VSEL(4), NA, RK817_LDO_VSEL_MASK, 0x70, },
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+ /* ldo5 */
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+ { 600000, 25000, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), NA, RK817_LDO_VSEL_MASK, 0x00, },
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+ { 3400000, 0, RK817_LDO_ON_VSEL(5), RK817_LDO_SLP_VSEL(5), NA, RK817_LDO_VSEL_MASK, 0x70, },
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+ /* ldo6 */
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+ { 600000, 25000, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), NA, RK817_LDO_VSEL_MASK, 0x00, },
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+ { 3400000, 0, RK817_LDO_ON_VSEL(6), RK817_LDO_SLP_VSEL(6), NA, RK817_LDO_VSEL_MASK, 0x70, },
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+ /* ldo7 */
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+ { 600000, 25000, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), NA, RK817_LDO_VSEL_MASK, 0x00, },
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+ { 3400000, 0, RK817_LDO_ON_VSEL(7), RK817_LDO_SLP_VSEL(7), NA, RK817_LDO_VSEL_MASK, 0x70, },
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+ /* ldo8 */
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+ { 600000, 25000, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), NA, RK817_LDO_VSEL_MASK, 0x00, },
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+ { 3400000, 0, RK817_LDO_ON_VSEL(8), RK817_LDO_SLP_VSEL(8), NA, RK817_LDO_VSEL_MASK, 0x70, },
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+ /* ldo9 */
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+ { 600000, 25000, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), NA, RK817_LDO_VSEL_MASK, 0x00, },
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+ { 3400000, 0, RK817_LDO_ON_VSEL(9), RK817_LDO_SLP_VSEL(9), NA, RK817_LDO_VSEL_MASK, 0x70, },
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+};
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+
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static const struct rk8xx_reg_info rk818_ldo[] = {
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{ 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
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{ 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
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@@ -152,6 +222,24 @@ static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
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default:
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return &rk816_buck[num + 4];
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}
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+
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+ case RK817_ID:
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+ switch (num) {
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+ case 0 ... 2:
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+ if (uvolt < 1500000)
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+ return &rk817_buck[num * 3 + 0];
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+ else if (uvolt < 2400000)
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+ return &rk817_buck[num * 3 + 1];
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+ else
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+ return &rk817_buck[num * 3 + 2];
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+ case 3:
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+ if (uvolt < 1500000)
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+ return &rk817_buck[num * 3 + 0];
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+ else if (uvolt < 3400000)
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+ return &rk817_buck[num * 3 + 1];
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+ else
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+ return &rk817_buck[num * 3 + 2];
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+ }
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case RK818_ID:
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return &rk818_buck[num];
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default:
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@@ -189,7 +277,7 @@ static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
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static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
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{
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uint mask, value, en_reg;
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- int ret;
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+ int ret = 0;
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struct rk8xx_priv *priv = dev_get_priv(pmic);
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switch (priv->variant) {
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@@ -220,6 +308,15 @@ static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
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ret = pmic_clrsetbits(pmic, REG_DCDC_EN, mask,
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enable ? mask : 0);
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break;
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+ case RK817_ID:
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+ if (buck < 4) {
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+ if (enable)
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+ value = ((1 << buck) | (1 << (buck + 4)));
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+ else
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+ value = ((0 << buck) | (1 << (buck + 4)));
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+ ret = pmic_reg_write(pmic, RK817_POWER_EN(0), value);
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+ }
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+ break;
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default:
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ret = -EINVAL;
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}
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@@ -272,6 +369,12 @@ static int _buck_get_enable(struct udevice *pmic, int buck)
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if (ret < 0)
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return ret;
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break;
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+ case RK817_ID:
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+ if (buck < 4) {
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+ mask = 1 << buck;
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+ ret = pmic_reg_read(pmic, RK817_POWER_EN(0));
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+ }
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+ break;
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}
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if (ret < 0)
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@@ -282,7 +385,7 @@ static int _buck_get_enable(struct udevice *pmic, int buck)
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static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
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{
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- uint mask;
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+ uint mask = 0;
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int ret;
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struct rk8xx_priv *priv = dev_get_priv(pmic);
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@@ -299,6 +402,12 @@ static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
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ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF1, mask,
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enable ? 0 : mask);
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break;
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+ case RK817_ID:
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+ if (buck < 4)
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+ mask = 1 << buck;
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+ ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(0), mask,
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+ enable ? mask : 0);
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+ break;
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default:
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ret = -EINVAL;
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}
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@@ -310,7 +419,7 @@ static int _buck_get_suspend_enable(struct udevice *pmic, int buck)
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{
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struct rk8xx_priv *priv = dev_get_priv(pmic);
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int ret, val;
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- uint mask;
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+ uint mask = 0;
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switch (priv->variant) {
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case RK805_ID:
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@@ -329,6 +438,15 @@ static int _buck_get_suspend_enable(struct udevice *pmic, int buck)
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return val;
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ret = val & mask ? 0 : 1;
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break;
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+ case RK817_ID:
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+ if (buck < 4)
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+ mask = 1 << buck;
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+
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+ val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(0));
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+ if (val < 0)
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+ return val;
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+ ret = val & mask ? 1 : 0;
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+ break;
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default:
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ret = -EINVAL;
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}
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@@ -345,6 +463,11 @@ static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
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case RK805_ID:
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case RK816_ID:
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return &rk816_ldo[num];
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+ case RK817_ID:
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+ if (uvolt < 3400000)
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+ return &rk817_ldo[num * 2 + 0];
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+ else
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+ return &rk817_ldo[num * 2 + 1];
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case RK818_ID:
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return &rk818_ldo[num];
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default:
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@@ -376,6 +499,20 @@ static int _ldo_get_enable(struct udevice *pmic, int ldo)
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if (ret < 0)
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return ret;
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break;
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+ case RK817_ID:
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+ if (ldo < 4) {
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+ mask = 1 << ldo;
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+ ret = pmic_reg_read(pmic, RK817_POWER_EN(1));
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+ } else if (ldo < 8) {
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+ mask = 1 << (ldo - 4);
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+ ret = pmic_reg_read(pmic, RK817_POWER_EN(2));
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+ } else if (ldo == 8) {
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+ mask = 1 << 0;
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+ ret = pmic_reg_read(pmic, RK817_POWER_EN(3));
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+ } else {
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+ return false;
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+ }
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+ break;
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}
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if (ret < 0)
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@@ -412,6 +549,24 @@ static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
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ret = pmic_clrsetbits(pmic, REG_LDO_EN, mask,
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enable ? mask : 0);
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break;
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+ case RK817_ID:
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+ if (ldo < 4) {
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+ en_reg = RK817_POWER_EN(1);
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+ } else if (ldo < 8) {
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+ ldo -= 4;
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+ en_reg = RK817_POWER_EN(2);
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+ } else if (ldo == 8) {
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+ ldo = 0; /* BIT 0 */
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+ en_reg = RK817_POWER_EN(3);
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+ } else {
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+ return -EINVAL;
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+ }
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+ if (enable)
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+ value = ((1 << ldo) | (1 << (ldo + 4)));
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+ else
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+ value = ((0 << ldo) | (1 << (ldo + 4)));
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+ ret = pmic_reg_write(pmic, en_reg, value);
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+ break;
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}
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return ret;
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@@ -436,6 +591,17 @@ static int _ldo_set_suspend_enable(struct udevice *pmic, int ldo, bool enable)
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ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF2, mask,
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enable ? 0 : mask);
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break;
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+ case RK817_ID:
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+ if (ldo == 8) {
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+ mask = 1 << 4; /* LDO9 */
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+ ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(0), mask,
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+ enable ? mask : 0);
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+ } else {
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+ mask = 1 << ldo;
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+ ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(1), mask,
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+ enable ? mask : 0);
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+ }
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+ break;
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}
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return ret;
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@@ -464,6 +630,21 @@ static int _ldo_get_suspend_enable(struct udevice *pmic, int ldo)
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return val;
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ret = val & mask ? 0 : 1;
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break;
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+ case RK817_ID:
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+ if (ldo == 8) {
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+ mask = 1 << 4; /* LDO9 */
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+ val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(0));
|
|
|
+ if (val < 0)
|
|
|
+ return val;
|
|
|
+ ret = val & mask ? 1 : 0;
|
|
|
+ } else {
|
|
|
+ mask = 1 << ldo;
|
|
|
+ val = pmic_reg_read(pmic, RK817_POWER_SLP_EN(1));
|
|
|
+ if (val < 0)
|
|
|
+ return val;
|
|
|
+ ret = val & mask ? 1 : 0;
|
|
|
+ }
|
|
|
+ break;
|
|
|
}
|
|
|
|
|
|
return ret;
|