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x86: Add an option to control the position of U-Boot

The existing work-around for positioning U-Boot in the ROM when it
actually runs from RAM still exists and there is not obvious way to change
this.

Add a proper Kconfig option to handle this case. This also adds a new bool
property to indicate whether CONFIG_SYS_TEXT_BASE exists.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass 4 years ago
parent
commit
b31129528e
5 changed files with 16 additions and 18 deletions
  1. 6 3
      Kconfig
  2. 5 0
      arch/x86/Kconfig
  3. 3 15
      arch/x86/dts/u-boot.dtsi
  4. 1 0
      configs/chromebook_samus_tpl_defconfig
  5. 1 0
      configs/qemu-x86_64_defconfig

+ 6 - 3
Kconfig

@@ -545,9 +545,14 @@ config SYS_EXTRA_OPTIONS
 	  configuration to Kconfig. Since this option will be removed sometime,
 	  configuration to Kconfig. Since this option will be removed sometime,
 	  new boards should not use this option.
 	  new boards should not use this option.
 
 
-config SYS_TEXT_BASE
+config HAVE_SYS_TEXT_BASE
+	bool
 	depends on !NIOS2 && !XTENSA
 	depends on !NIOS2 && !XTENSA
 	depends on !EFI_APP
 	depends on !EFI_APP
+	default y
+
+config SYS_TEXT_BASE
+	depends on HAVE_SYS_TEXT_BASE
 	default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
 	default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
 	default 0x4a000000 if ARCH_SUNXI && !MACH_SUN9I && !MACH_SUN8I_V3S
 	default 0x4a000000 if ARCH_SUNXI && !MACH_SUN9I && !MACH_SUN8I_V3S
 	default 0x2a000000 if ARCH_SUNXI && MACH_SUN9I
 	default 0x2a000000 if ARCH_SUNXI && MACH_SUN9I
@@ -556,8 +561,6 @@ config SYS_TEXT_BASE
 	help
 	help
 	  The address in memory that U-Boot will be running from, initially.
 	  The address in memory that U-Boot will be running from, initially.
 
 
-
-
 config SYS_CLK_FREQ
 config SYS_CLK_FREQ
 	depends on ARC || ARCH_SUNXI || MPC83xx
 	depends on ARC || ARCH_SUNXI || MPC83xx
 	int "CPU clock frequency"
 	int "CPU clock frequency"

+ 5 - 0
arch/x86/Kconfig

@@ -899,4 +899,9 @@ config CACHE_QOS_SIZE_PER_BIT
 	depends on INTEL_CAR_CQOS
 	depends on INTEL_CAR_CQOS
 	default 0x20000 # 128 KB
 	default 0x20000 # 128 KB
 
 
+config X86_OFFSET_U_BOOT
+	hex "Offset of U-Boot in ROM image"
+	depends on HAVE_SYS_TEXT_BASE
+	default SYS_TEXT_BASE
+
 endmenu
 endmenu

+ 3 - 15
arch/x86/dts/u-boot.dtsi

@@ -50,7 +50,7 @@
 	u-boot-spl-dtb {
 	u-boot-spl-dtb {
 	};
 	};
 	u-boot {
 	u-boot {
-		offset = <CONFIG_SYS_TEXT_BASE>;
+		offset = <CONFIG_X86_OFFSET_U_BOOT>;
 	};
 	};
 #elif defined(CONFIG_SPL)
 #elif defined(CONFIG_SPL)
 	u-boot-spl-with-ucode-ptr {
 	u-boot-spl-with-ucode-ptr {
@@ -60,23 +60,11 @@
 		type = "u-boot-dtb-with-ucode";
 		type = "u-boot-dtb-with-ucode";
 	};
 	};
 	u-boot {
 	u-boot {
-		/*
-		 * TODO(sjg@chromium.org):
-		 * Normally we use CONFIG_SYS_TEXT_BASE as the flash offset. But
-		 * for boards with textbase in SDRAM we cannot do this. Just use
-		 * an assumed-valid value (1MB before the end of flash) here so
-		 * that we can actually build an image for coreboot, etc.
-		 * We need a better solution, perhaps a separate Kconfig.
-		 */
-#if CONFIG_SYS_TEXT_BASE == 0x1110000
-		offset = <0xfff00000>;
-#else
-		offset = <CONFIG_SYS_TEXT_BASE>;
-#endif
+		offset = <CONFIG_X86_OFFSET_U_BOOT>;
 	};
 	};
 #else
 #else
 	u-boot-with-ucode-ptr {
 	u-boot-with-ucode-ptr {
-		offset = <CONFIG_SYS_TEXT_BASE>;
+		offset = <CONFIG_X86_OFFSET_U_BOOT>;
 	};
 	};
 #endif
 #endif
 #ifdef CONFIG_HAVE_MICROCODE
 #ifdef CONFIG_HAVE_MICROCODE

+ 1 - 0
configs/chromebook_samus_tpl_defconfig

@@ -16,6 +16,7 @@ CONFIG_HAVE_REFCODE=y
 CONFIG_SMP=y
 CONFIG_SMP=y
 CONFIG_HAVE_VGA_BIOS=y
 CONFIG_HAVE_VGA_BIOS=y
 CONFIG_SPL_TEXT_BASE=0xffe70000
 CONFIG_SPL_TEXT_BASE=0xffe70000
+CONFIG_X86_OFFSET_U_BOOT=0xfff00000
 CONFIG_BOOTSTAGE=y
 CONFIG_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y
 CONFIG_BOOTSTAGE_REPORT=y
 CONFIG_SHOW_BOOT_PROGRESS=y
 CONFIG_SHOW_BOOT_PROGRESS=y

+ 1 - 0
configs/qemu-x86_64_defconfig

@@ -13,6 +13,7 @@ CONFIG_SMP=y
 CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_ACPI_TABLE=y
 CONFIG_GENERATE_ACPI_TABLE=y
+CONFIG_X86_OFFSET_U_BOOT=0xfff00000
 CONFIG_SPL_TEXT_BASE=0xfffd0000
 CONFIG_SPL_TEXT_BASE=0xfffd0000
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BUILD_ROM=y
 CONFIG_BUILD_ROM=y