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+Intel x86 PINCTRL/GPIO controller
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+
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+Pin-muxing on broadwell devices can be described with a node for the PINCTRL
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+master node and a set of child nodes for each required pin state on the SoC.
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+These pin states use phandles and are referred to but a configuration section
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+which lists all pins in the device.
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+
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+The PINCTRL master node requires the following properties:
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+- compatible : "intel,x86-broadwell-pinctrl"
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+
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+Pin state nodes must be sub-nodes of the pinctrl master node. The must have
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+a phandle. They can contain the following optional properties:
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+- mode-gpio - forces the pin into GPIO mode
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+- output-value - sets the default output value of the GPIO, 0 (low, default)
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+ or 1 (high)
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+- direction - sets the direction of the gpio, either PIN_INPUT (default)
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+ or PIN_OUTPUT
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+- invert - the input pin is inverted
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+- trigger - sets the trigger type, either TRIGGER_EDGE (default) or
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+ TRIGGER_LEVEL
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+- sense-disable - the input state sense is disabled
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+- owner 0 sets the owner of the pin, either OWNER_ACPI (default) or
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+ ONWER_GPIO
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+- route - sets whether the pin is routed, either PIRQ_APIC_MASK or
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+ PIRQ_APIC_ROUTE
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+- irq-enable - the interrupt is enabled
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+- reset-rsmrst - the pin will only be reset by RSMRST
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+- pirq-apic - the pin will be routed to the IOxAPIC
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+
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+The first pin state will be the default, so pins without a configuration will
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+use that.
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+
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+The pin configuration node is also a sub-node of the pinctrl master node, but
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+does not have a phandle. It has a single property:
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+
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+- config - configuration to use for each pin. Each entry has of 3 cells:
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+ - GPIO number (0..94)
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+ - phandle of configuration (above)
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+ - interrupt number (0..15)
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+
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+ There should be one entry for each pin (i.e. 95 entries).
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+ But missing pins will receive the default configuration.
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+
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+Example:
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+
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+pch_pinctrl {
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+ compatible = "intel,x86-broadwell-pinctrl";
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+
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+ /* Put this first: it is the default */
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+ gpio_unused: gpio-unused {
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+ mode-gpio;
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+ direction = <PIN_INPUT>;
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+ owner = <OWNER_GPIO>;
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+ sense-disable;
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+ };
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+
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+ gpio_acpi_sci: acpi-sci {
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+ mode-gpio;
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+ direction = <PIN_INPUT>;
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+ invert;
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+ route = <ROUTE_SCI>;
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+ };
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+
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+ gpio_acpi_smi: acpi-smi {
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+ mode-gpio;
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+ direction = <PIN_INPUT>;
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+ invert;
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+ route = <ROUTE_SMI>;
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+ };
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+
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+ gpio_input: gpio-input {
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+ mode-gpio;
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+ direction = <PIN_INPUT>;
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+ owner = <OWNER_GPIO>;
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+ };
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+
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+ gpio_input_invert: gpio-input-invert {
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+ mode-gpio;
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+ direction = <PIN_INPUT>;
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+ owner = <OWNER_GPIO>;
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+ invert;
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+ };
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+
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+ gpio_native: gpio-native {
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+ };
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+
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+ gpio_out_high: gpio-out-high {
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+ mode-gpio;
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+ direction = <PIN_OUTPUT>;
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+ output-value = <1>;
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+ owner = <OWNER_GPIO>;
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+ sense-disable;
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+ };
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+
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+ gpio_out_low: gpio-out-low {
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+ mode-gpio;
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+ direction = <PIN_OUTPUT>;
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+ output-value = <0>;
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+ owner = <OWNER_GPIO>;
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+ sense-disable;
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+ };
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+
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+ gpio_pirq: gpio-pirq {
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+ mode-gpio;
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+ direction = <PIN_INPUT>;
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+ owner = <OWNER_GPIO>;
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+ pirq-apic = <PIRQ_APIC_ROUTE>;
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+ };
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+
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+ soc_gpio@0 {
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+ config =
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+ <0 &gpio_unused 0>, /* unused */
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+ <1 &gpio_unused 0>, /* unused */
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+ <2 &gpio_unused 0>, /* unused */
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+ <3 &gpio_unused 0>, /* unused */
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+ <4 &gpio_native 0>, /* native: i2c0_sda_gpio4 */
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+ <5 &gpio_native 0>, /* native: i2c0_scl_gpio5 */
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+ <6 &gpio_native 0>, /* native: i2c1_sda_gpio6 */
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+ <7 &gpio_native 0>, /* native: i2c1_scl_gpio7 */
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+ <8 &gpio_acpi_sci 0>, /* pch_lte_wake_l */
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+ <9 &gpio_input_invert 0>,/* trackpad_int_l (wake) */
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+ <10 &gpio_acpi_sci 0>, /* pch_wlan_wake_l */
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+ <11 &gpio_unused 0>, /* unused */
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+ <12 &gpio_unused 0>, /* unused */
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+ <13 &gpio_pirq 3>, /* trackpad_int_l (pirql) */
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+ <14 &gpio_pirq 4>, /* touch_int_l (pirqm) */
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+ <15 &gpio_unused 0>, /* unused (strap) */
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+ <16 &gpio_input 0>, /* pch_wp */
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+ <17 &gpio_unused 0>, /* unused */
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+ <18 &gpio_unused 0>, /* unused */
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+ <19 &gpio_unused 0>, /* unused */
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+ <20 &gpio_native 0>, /* pcie_wlan_clkreq_l */
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+ <21 &gpio_out_high 0>, /* pp3300_ssd_en */
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+ <22 &gpio_unused 0>, /* unused */
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+ <23 &gpio_out_low 0>, /* pp3300_autobahn_en */
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+ <24 &gpio_unused 0>, /* unused */
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+ <25 &gpio_input 0>, /* ec_in_rw */
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+ <26 &gpio_unused 0>, /* unused */
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+ <27 &gpio_acpi_sci 0>, /* pch_wake_l */
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+ <28 &gpio_unused 0>, /* unused */
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+ <29 &gpio_unused 0>, /* unused */
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+ <30 &gpio_native 0>, /* native: pch_suswarn_l */
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+ <31 &gpio_native 0>, /* native: acok_buf */
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+ <32 &gpio_native 0>, /* native: lpc_clkrun_l */
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+ <33 &gpio_native 0>, /* native: ssd_devslp */
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+ <34 &gpio_acpi_smi 0>, /* ec_smi_l */
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+ <35 &gpio_acpi_smi 0>, /* pch_nmi_dbg_l (route in nmi_en) */
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+ <36 &gpio_acpi_sci 0>, /* ec_sci_l */
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+ <37 &gpio_unused 0>, /* unused */
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+ <38 &gpio_unused 0>, /* unused */
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+ <39 &gpio_unused 0>, /* unused */
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+ <40 &gpio_native 0>, /* native: pch_usb1_oc_l */
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+ <41 &gpio_native 0>, /* native: pch_usb2_oc_l */
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+ <42 &gpio_unused 0>, /* wlan_disable_l */
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+ <43 &gpio_out_high 0>, /* pp1800_codec_en */
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+ <44 &gpio_unused 0>, /* unused */
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+ <45 &gpio_acpi_sci 0>, /* dsp_int - codec wake */
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+ <46 &gpio_pirq 6>, /* hotword_det_l_3v3 (pirqo) - codec irq */
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+ <47 &gpio_out_low 0>, /* ssd_reset_l */
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+ <48 &gpio_unused 0>, /* unused */
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+ <49 &gpio_unused 0>, /* unused */
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+ <50 &gpio_unused 0>, /* unused */
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+ <51 &gpio_unused 0>, /* unused */
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+ <52 &gpio_input 0>, /* sim_det */
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+ <53 &gpio_unused 0>, /* unused */
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+ <54 &gpio_unused 0>, /* unused */
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+ <55 &gpio_unused 0>, /* unused */
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+ <56 &gpio_unused 0>, /* unused */
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+ <57 &gpio_out_high 0>, /* codec_reset_l */
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+ <58 &gpio_unused 0>, /* unused */
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+ <59 &gpio_out_high 0>, /* lte_disable_l */
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+ <60 &gpio_unused 0>, /* unused */
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+ <61 &gpio_native 0>, /* native: pch_sus_stat */
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+ <62 &gpio_native 0>, /* native: pch_susclk */
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+ <63 &gpio_native 0>, /* native: pch_slp_s5_l */
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+ <64 &gpio_unused 0>, /* unused */
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+ <65 &gpio_input 0>, /* ram_id3 */
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+ <66 &gpio_input 0>, /* ram_id3_old (strap) */
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+ <67 &gpio_input 0>, /* ram_id0 */
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+ <68 &gpio_input 0>, /* ram_id1 */
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+ <69 &gpio_input 0>, /* ram_id2 */
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+ <70 &gpio_unused 0>, /* unused */
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+ <71 &gpio_native 0>, /* native: modphy_en */
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+ <72 &gpio_unused 0>, /* unused */
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+ <73 &gpio_unused 0>, /* unused */
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+ <74 &gpio_unused 0>, /* unused */
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+ <75 &gpio_unused 0>, /* unused */
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+ <76 &gpio_unused 0>, /* unused */
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+ <77 &gpio_unused 0>, /* unused */
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+ <78 &gpio_unused 0>, /* unused */
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+ <79 &gpio_unused 0>, /* unused */
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+ <80 &gpio_unused 0>, /* unused */
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+ <81 &gpio_unused 0>, /* unused */
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+ <82 &gpio_native 0>, /* native: ec_rcin_l */
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+ <83 &gpio_native 0>, /* gspi0_cs */
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+ <84 &gpio_native 0>, /* gspi0_clk */
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+ <85 &gpio_native 0>, /* gspi0_miso */
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+ <86 &gpio_native 0>, /* gspi0_mosi (strap) */
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+ <87 &gpio_unused 0>, /* unused */
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+ <88 &gpio_unused 0>, /* unused */
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+ <89 &gpio_out_high 0>, /* pp3300_sd_en */
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+ <90 &gpio_unused 0>, /* unused */
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+ <91 &gpio_unused 0>, /* unused */
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+ <92 &gpio_unused 0>, /* unused */
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+ <93 &gpio_unused 0>, /* unused */
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+ <94 &gpio_unused 0 >; /* unused */
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+ };
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+};
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