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@@ -13,6 +13,24 @@ config MISC
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set of generic read, write and ioctl methods may be used to
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access the device.
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+config SPL_MISC
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+ bool "Enable Driver Model for Misc drivers in SPL"
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+ depends on SPL_DM
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+ help
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+ Enable driver model for miscellaneous devices. This class is
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+ used only for those do not fit other more general classes. A
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+ set of generic read, write and ioctl methods may be used to
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+ access the device.
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+
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+config TPL_MISC
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+ bool "Enable Driver Model for Misc drivers in TPL"
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+ depends on TPL_DM
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+ help
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+ Enable driver model for miscellaneous devices. This class is
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+ used only for those do not fit other more general classes. A
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+ set of generic read, write and ioctl methods may be used to
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+ access the device.
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+
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config ALTERA_SYSID
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bool "Altera Sysid support"
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depends on MISC
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@@ -68,6 +86,24 @@ config CROS_EC
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control access to the battery and main PMIC depending on the
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device. You can use the 'crosec' command to access it.
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+config SPL_CROS_EC
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+ bool "Enable Chrome OS EC in SPL"
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+ help
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+ Enable access to the Chrome OS EC in SPL. This is a separate
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+ microcontroller typically available on a SPI bus on Chromebooks. It
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+ provides access to the keyboard, some internal storage and may
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+ control access to the battery and main PMIC depending on the
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+ device. You can use the 'crosec' command to access it.
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+
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+config TPL_CROS_EC
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+ bool "Enable Chrome OS EC in TPL"
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+ help
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+ Enable access to the Chrome OS EC in TPL. This is a separate
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+ microcontroller typically available on a SPI bus on Chromebooks. It
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+ provides access to the keyboard, some internal storage and may
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+ control access to the battery and main PMIC depending on the
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+ device. You can use the 'crosec' command to access it.
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+
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config CROS_EC_I2C
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bool "Enable Chrome OS EC I2C driver"
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depends on CROS_EC
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@@ -86,6 +122,24 @@ config CROS_EC_LPC
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through a legacy port interface, so on x86 machines the main
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function of the EC is power and thermal management.
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+config SPL_CROS_EC_LPC
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+ bool "Enable Chrome OS EC LPC driver in SPL"
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+ depends on CROS_EC
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+ help
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+ Enable I2C access to the Chrome OS EC. This is used on x86
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+ Chromebooks such as link and falco. The keyboard is provided
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+ through a legacy port interface, so on x86 machines the main
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+ function of the EC is power and thermal management.
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+
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+config TPL_CROS_EC_LPC
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+ bool "Enable Chrome OS EC LPC driver in TPL"
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+ depends on CROS_EC
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+ help
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+ Enable I2C access to the Chrome OS EC. This is used on x86
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+ Chromebooks such as link and falco. The keyboard is provided
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+ through a legacy port interface, so on x86 machines the main
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+ function of the EC is power and thermal management.
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+
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config CROS_EC_SANDBOX
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bool "Enable Chrome OS EC sandbox driver"
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depends on CROS_EC && SANDBOX
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@@ -95,6 +149,24 @@ config CROS_EC_SANDBOX
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EC flash read/write/erase support and a few other things. It is
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enough to perform a Chrome OS verified boot on sandbox.
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+config SPL_CROS_EC_SANDBOX
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+ bool "Enable Chrome OS EC sandbox driver in SPL"
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+ depends on SPL_CROS_EC && SANDBOX
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+ help
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+ Enable a sandbox emulation of the Chrome OS EC in SPL. This supports
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+ keyboard (use the -l flag to enable the LCD), verified boot context,
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+ EC flash read/write/erase support and a few other things. It is
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+ enough to perform a Chrome OS verified boot on sandbox.
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+
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+config TPL_CROS_EC_SANDBOX
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+ bool "Enable Chrome OS EC sandbox driver in TPL"
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+ depends on TPL_CROS_EC && SANDBOX
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+ help
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+ Enable a sandbox emulation of the Chrome OS EC in TPL. This supports
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+ keyboard (use the -l flag to enable the LCD), verified boot context,
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+ EC flash read/write/erase support and a few other things. It is
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+ enough to perform a Chrome OS verified boot on sandbox.
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+
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config CROS_EC_SPI
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bool "Enable Chrome OS EC SPI driver"
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depends on CROS_EC
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