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@@ -218,44 +218,6 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host)
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return 0;
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}
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-const struct sdhci_ops am654_sdhci_ops = {
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- .set_ios_post = &am654_sdhci_set_ios_post,
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- .set_control_reg = &am654_sdhci_set_control_reg,
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-};
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-
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-const struct am654_driver_data am654_drv_data = {
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- .ops = &am654_sdhci_ops,
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- .flags = IOMUX_PRESENT | FREQSEL_2_BIT | DLL_PRESENT | STRBSEL_4_BIT,
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-};
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-
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-const struct am654_driver_data j721e_8bit_drv_data = {
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- .ops = &am654_sdhci_ops,
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- .flags = DLL_PRESENT,
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-};
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-
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-static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host)
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-{
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- struct udevice *dev = host->mmc->dev;
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- struct am654_sdhci_plat *plat = dev_get_platdata(dev);
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- u32 otap_del_sel, mask, val;
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-
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- otap_del_sel = plat->otap_del_sel[host->mmc->selected_mode];
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- mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
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- val = (1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT);
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- regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
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-
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- return 0;
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-}
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-
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-const struct sdhci_ops j721e_4bit_sdhci_ops = {
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- .set_ios_post = &j721e_4bit_sdhci_set_ios_post,
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-};
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-
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-const struct am654_driver_data j721e_4bit_drv_data = {
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- .ops = &j721e_4bit_sdhci_ops,
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- .flags = IOMUX_PRESENT,
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-};
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-
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int am654_sdhci_init(struct am654_sdhci_plat *plat)
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{
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u32 ctl_cfg_2 = 0;
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@@ -302,6 +264,73 @@ int am654_sdhci_init(struct am654_sdhci_plat *plat)
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return 0;
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}
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+#define MAX_SDCD_DEBOUNCE_TIME 2000
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+static int am654_sdhci_deferred_probe(struct sdhci_host *host)
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+{
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+ struct udevice *dev = host->mmc->dev;
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+ struct am654_sdhci_plat *plat = dev_get_platdata(dev);
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+ unsigned long start;
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+ int val;
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+
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+ /*
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+ * The controller takes about 1 second to debounce the card detect line
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+ * and doesn't let us power on until that time is up. Instead of waiting
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+ * for 1 second at every stage, poll on the CARD_PRESENT bit upto a
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+ * maximum of 2 seconds to be safe..
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+ */
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+ start = get_timer(0);
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+ do {
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+ if (get_timer(start) > MAX_SDCD_DEBOUNCE_TIME)
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+ return -ENOMEDIUM;
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+
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+ val = mmc_getcd(host->mmc);
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+ } while (!val);
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+
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+ am654_sdhci_init(plat);
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+
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+ return sdhci_probe(dev);
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+}
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+
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+const struct sdhci_ops am654_sdhci_ops = {
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+ .deferred_probe = am654_sdhci_deferred_probe,
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+ .set_ios_post = &am654_sdhci_set_ios_post,
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+ .set_control_reg = &am654_sdhci_set_control_reg,
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+};
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+
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+const struct am654_driver_data am654_drv_data = {
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+ .ops = &am654_sdhci_ops,
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+ .flags = IOMUX_PRESENT | FREQSEL_2_BIT | DLL_PRESENT | STRBSEL_4_BIT,
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+};
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+
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+const struct am654_driver_data j721e_8bit_drv_data = {
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+ .ops = &am654_sdhci_ops,
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+ .flags = DLL_PRESENT,
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+};
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+
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+static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host)
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+{
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+ struct udevice *dev = host->mmc->dev;
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+ struct am654_sdhci_plat *plat = dev_get_platdata(dev);
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+ u32 otap_del_sel, mask, val;
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+
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+ otap_del_sel = plat->otap_del_sel[host->mmc->selected_mode];
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+ mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
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+ val = (1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT);
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+ regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
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+
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+ return 0;
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+}
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+
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+const struct sdhci_ops j721e_4bit_sdhci_ops = {
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+ .deferred_probe = am654_sdhci_deferred_probe,
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+ .set_ios_post = &j721e_4bit_sdhci_set_ios_post,
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+};
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+
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+const struct am654_driver_data j721e_4bit_drv_data = {
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+ .ops = &j721e_4bit_sdhci_ops,
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+ .flags = IOMUX_PRESENT,
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+};
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+
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static int sdhci_am654_get_otap_delay(struct udevice *dev,
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struct mmc_config *cfg)
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{
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@@ -375,9 +404,7 @@ static int am654_sdhci_probe(struct udevice *dev)
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regmap_init_mem_index(dev_ofnode(dev), &plat->base, 1);
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- am654_sdhci_init(plat);
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-
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- return sdhci_probe(dev);
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+ return 0;
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}
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static int am654_sdhci_ofdata_to_platdata(struct udevice *dev)
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