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@@ -0,0 +1,50 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * Copyright (C) 2020 SiFive, Inc
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+ *
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+ * Authors:
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+ * Pragnesh Patel <pragnesh.patel@sifive.com>
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+ */
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+
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+#include <common.h>
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+#include <asm/io.h>
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+#include <asm/global_data.h>
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+
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+
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+DECLARE_GLOBAL_DATA_PTR;
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+
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+#if CONFIG_IS_ENABLED(STARFIVE_JH7110_L2CC_FLUSH)
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+#define L2_CACHE_FLUSH64 0x200
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+#define L2_CACHE_BASE_ADDR 0x2010000
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+
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+void flush_dcache_range(unsigned long start, unsigned long end)
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+{
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+ unsigned long line;
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+ volatile unsigned long *flush64;
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+
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+ /* make sure the address is in the range */
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+ if(start > end ||
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+ start < CONFIG_STARFIVE_JH7110_L2CC_FLUSH_START ||
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+ end > (CONFIG_STARFIVE_JH7110_L2CC_FLUSH_START +
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+ CONFIG_STARFIVE_JH7110_L2CC_FLUSH_SIZE))
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+ return;
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+
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+ /*In order to improve the performance, change base addr to a fixed value*/
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+ flush64 = (volatile unsigned long *)(L2_CACHE_BASE_ADDR + L2_CACHE_FLUSH64);
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+
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+ /* memory barrier */
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+ mb();
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+ for (line = start; line < end; line += CONFIG_SYS_CACHELINE_SIZE) {
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+ (*flush64) = line;
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+ /* memory barrier */
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+ mb();
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+ }
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+
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+ return;
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+}
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+
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+void invalidate_dcache_range(unsigned long start, unsigned long end)
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+{
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+ flush_dcache_range(start,end);
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+}
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+#endif //SIFIVE_FU540_L2CC_FLUSH
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