|
@@ -4141,37 +4141,6 @@ unsigned long ps7_post_config_3_0[] = {
|
|
|
/* */
|
|
|
};
|
|
|
|
|
|
-unsigned long ps7_debug_3_0[] = {
|
|
|
- /* START: top */
|
|
|
- /* .. START: CROSS TRIGGER CONFIGURATIONS */
|
|
|
- /* .. .. START: UNLOCKING CTI REGISTERS */
|
|
|
- /* .. .. KEY = 0XC5ACCE55 */
|
|
|
- /* .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U */
|
|
|
- /* .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U */
|
|
|
- /* .. .. */
|
|
|
- EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
|
|
|
- /* .. .. KEY = 0XC5ACCE55 */
|
|
|
- /* .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U */
|
|
|
- /* .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U */
|
|
|
- /* .. .. */
|
|
|
- EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
|
|
|
- /* .. .. KEY = 0XC5ACCE55 */
|
|
|
- /* .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U */
|
|
|
- /* .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U */
|
|
|
- /* .. .. */
|
|
|
- EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
|
|
|
- /* .. .. FINISH: UNLOCKING CTI REGISTERS */
|
|
|
- /* .. .. START: ENABLING CTI MODULES AND CHANNELS */
|
|
|
- /* .. .. FINISH: ENABLING CTI MODULES AND CHANNELS */
|
|
|
- /* .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS */
|
|
|
- /* .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS */
|
|
|
- /* .. FINISH: CROSS TRIGGER CONFIGURATIONS */
|
|
|
- /* FINISH: top */
|
|
|
- /* */
|
|
|
- EMIT_EXIT(),
|
|
|
-
|
|
|
- /* */
|
|
|
-};
|
|
|
|
|
|
unsigned long ps7_pll_init_data_2_0[] = {
|
|
|
/* START: top */
|
|
@@ -8467,37 +8436,6 @@ unsigned long ps7_post_config_2_0[] = {
|
|
|
/* */
|
|
|
};
|
|
|
|
|
|
-unsigned long ps7_debug_2_0[] = {
|
|
|
- /* START: top */
|
|
|
- /* .. START: CROSS TRIGGER CONFIGURATIONS */
|
|
|
- /* .. .. START: UNLOCKING CTI REGISTERS */
|
|
|
- /* .. .. KEY = 0XC5ACCE55 */
|
|
|
- /* .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U */
|
|
|
- /* .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U */
|
|
|
- /* .. .. */
|
|
|
- EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
|
|
|
- /* .. .. KEY = 0XC5ACCE55 */
|
|
|
- /* .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U */
|
|
|
- /* .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U */
|
|
|
- /* .. .. */
|
|
|
- EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
|
|
|
- /* .. .. KEY = 0XC5ACCE55 */
|
|
|
- /* .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U */
|
|
|
- /* .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U */
|
|
|
- /* .. .. */
|
|
|
- EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
|
|
|
- /* .. .. FINISH: UNLOCKING CTI REGISTERS */
|
|
|
- /* .. .. START: ENABLING CTI MODULES AND CHANNELS */
|
|
|
- /* .. .. FINISH: ENABLING CTI MODULES AND CHANNELS */
|
|
|
- /* .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS */
|
|
|
- /* .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS */
|
|
|
- /* .. FINISH: CROSS TRIGGER CONFIGURATIONS */
|
|
|
- /* FINISH: top */
|
|
|
- /* */
|
|
|
- EMIT_EXIT(),
|
|
|
-
|
|
|
- /* */
|
|
|
-};
|
|
|
|
|
|
unsigned long ps7_pll_init_data_1_0[] = {
|
|
|
/* START: top */
|
|
@@ -12726,37 +12664,6 @@ unsigned long ps7_post_config_1_0[] = {
|
|
|
/* */
|
|
|
};
|
|
|
|
|
|
-unsigned long ps7_debug_1_0[] = {
|
|
|
- /* START: top */
|
|
|
- /* .. START: CROSS TRIGGER CONFIGURATIONS */
|
|
|
- /* .. .. START: UNLOCKING CTI REGISTERS */
|
|
|
- /* .. .. KEY = 0XC5ACCE55 */
|
|
|
- /* .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U */
|
|
|
- /* .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U */
|
|
|
- /* .. .. */
|
|
|
- EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
|
|
|
- /* .. .. KEY = 0XC5ACCE55 */
|
|
|
- /* .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U */
|
|
|
- /* .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U */
|
|
|
- /* .. .. */
|
|
|
- EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
|
|
|
- /* .. .. KEY = 0XC5ACCE55 */
|
|
|
- /* .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U */
|
|
|
- /* .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U */
|
|
|
- /* .. .. */
|
|
|
- EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
|
|
|
- /* .. .. FINISH: UNLOCKING CTI REGISTERS */
|
|
|
- /* .. .. START: ENABLING CTI MODULES AND CHANNELS */
|
|
|
- /* .. .. FINISH: ENABLING CTI MODULES AND CHANNELS */
|
|
|
- /* .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS */
|
|
|
- /* .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS */
|
|
|
- /* .. FINISH: CROSS TRIGGER CONFIGURATIONS */
|
|
|
- /* FINISH: top */
|
|
|
- /* */
|
|
|
- EMIT_EXIT(),
|
|
|
-
|
|
|
- /* */
|
|
|
-};
|
|
|
|
|
|
#include "xil_io.h"
|
|
|
#define PS7_MASK_POLL_TIME 100000000
|
|
@@ -12926,27 +12833,6 @@ int ps7_post_config(void)
|
|
|
return PS7_INIT_SUCCESS;
|
|
|
}
|
|
|
|
|
|
-int ps7_debug(void)
|
|
|
-{
|
|
|
- /* Get the PS_VERSION on run time */
|
|
|
- unsigned long si_ver = ps7GetSiliconVersion();
|
|
|
- int ret = -1;
|
|
|
- if (si_ver == PCW_SILICON_VERSION_1) {
|
|
|
- ret = ps7_config(ps7_debug_1_0);
|
|
|
- if (ret != PS7_INIT_SUCCESS)
|
|
|
- return ret;
|
|
|
- } else if (si_ver == PCW_SILICON_VERSION_2) {
|
|
|
- ret = ps7_config(ps7_debug_2_0);
|
|
|
- if (ret != PS7_INIT_SUCCESS)
|
|
|
- return ret;
|
|
|
- } else {
|
|
|
- ret = ps7_config(ps7_debug_3_0);
|
|
|
- if (ret != PS7_INIT_SUCCESS)
|
|
|
- return ret;
|
|
|
- }
|
|
|
- return PS7_INIT_SUCCESS;
|
|
|
-}
|
|
|
-
|
|
|
int ps7_init(void)
|
|
|
{
|
|
|
/* Get the PS_VERSION on run time */
|