Browse Source

arm: zynq: Remove ps7_debug code

SPL is not calling this code that's why it is dead code and can be
removed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek 6 years ago
parent
commit
a3b36c8424

+ 0 - 10
board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c

@@ -255,12 +255,6 @@ unsigned long ps7_post_config_3_0[] = {
 	EMIT_EXIT(),
 };
 
-unsigned long ps7_debug_3_0[] = {
-	EMIT_WRITE(0XF8898FB0, 0xC5ACCE55U),
-	EMIT_WRITE(0XF8899FB0, 0xC5ACCE55U),
-	EMIT_WRITE(0XF8809FB0, 0xC5ACCE55U),
-	EMIT_EXIT(),
-};
 
 unsigned long ps7_reset_apu_3_0[] = {
 	EMIT_MASKWRITE(0xF8000244, 0x00000022U, 0x00000022U),
@@ -353,10 +347,6 @@ int ps7_post_config(void)
 	return ps7_config(ps7_post_config_3_0);
 }
 
-int ps7_debug(void)
-{
-	return ps7_config(ps7_debug_3_0);
-}
 
 int ps7_reset_apu(void)
 {

+ 0 - 1
board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.h

@@ -69,7 +69,6 @@ extern "C" {
 int ps7_config(unsigned long *);
 int ps7_init(void);
 int ps7_post_config(void);
-int ps7_debug(void);
 
 void perf_start_clock(void);
 void perf_disable_clock(void);

+ 0 - 112
board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c

@@ -4121,37 +4121,6 @@ unsigned long ps7_post_config_3_0[] = {
     //
 };
 
-unsigned long ps7_debug_3_0[] = {
-    // START: top
-    // .. START: CROSS TRIGGER CONFIGURATIONS
-    // .. .. START: UNLOCKING CTI REGISTERS
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. FINISH: UNLOCKING CTI REGISTERS
-    // .. .. START: ENABLING CTI MODULES AND CHANNELS
-    // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
-    // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. FINISH: CROSS TRIGGER CONFIGURATIONS
-    // FINISH: top
-    //
-    EMIT_EXIT(),
-
-    //
-};
 
 unsigned long ps7_pll_init_data_2_0[] = {
     // START: top
@@ -8419,37 +8388,6 @@ unsigned long ps7_post_config_2_0[] = {
     //
 };
 
-unsigned long ps7_debug_2_0[] = {
-    // START: top
-    // .. START: CROSS TRIGGER CONFIGURATIONS
-    // .. .. START: UNLOCKING CTI REGISTERS
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. FINISH: UNLOCKING CTI REGISTERS
-    // .. .. START: ENABLING CTI MODULES AND CHANNELS
-    // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
-    // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. FINISH: CROSS TRIGGER CONFIGURATIONS
-    // FINISH: top
-    //
-    EMIT_EXIT(),
-
-    //
-};
 
 unsigned long ps7_pll_init_data_1_0[] = {
     // START: top
@@ -12650,37 +12588,6 @@ unsigned long ps7_post_config_1_0[] = {
     //
 };
 
-unsigned long ps7_debug_1_0[] = {
-    // START: top
-    // .. START: CROSS TRIGGER CONFIGURATIONS
-    // .. .. START: UNLOCKING CTI REGISTERS
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. FINISH: UNLOCKING CTI REGISTERS
-    // .. .. START: ENABLING CTI MODULES AND CHANNELS
-    // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
-    // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. FINISH: CROSS TRIGGER CONFIGURATIONS
-    // FINISH: top
-    //
-    EMIT_EXIT(),
-
-    //
-};
 
 
 #include "xil_io.h"
@@ -12843,25 +12750,6 @@ ps7_post_config()
   return PS7_INIT_SUCCESS;
 }
 
-int
-ps7_debug()
-{
-  // Get the PS_VERSION on run time
-  unsigned long si_ver = ps7GetSiliconVersion ();
-  int ret = -1;
-  if (si_ver == PCW_SILICON_VERSION_1) {
-      ret = ps7_config (ps7_debug_1_0);
-      if (ret != PS7_INIT_SUCCESS) return ret;
-  } else if (si_ver == PCW_SILICON_VERSION_2) {
-      ret = ps7_config (ps7_debug_2_0);
-      if (ret != PS7_INIT_SUCCESS) return ret;
-  } else {
-      ret = ps7_config (ps7_debug_3_0);
-      if (ret != PS7_INIT_SUCCESS) return ret;
-  }
-  return PS7_INIT_SUCCESS;
-}
-
 int
 ps7_init()
 {

+ 0 - 1
board/xilinx/zynq/zynq-microzed/ps7_init_gpl.h

@@ -104,7 +104,6 @@ extern unsigned long  * ps7_peripherals_init_data;
 int ps7_config( unsigned long*);
 int ps7_init();
 int ps7_post_config();
-int ps7_debug();
 char* getPS7MessageInfo(unsigned key);
 
 void perf_start_clock(void);

+ 0 - 112
board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c

@@ -4228,37 +4228,6 @@ unsigned long ps7_post_config_3_0[] = {
     //
 };
 
-unsigned long ps7_debug_3_0[] = {
-    // START: top
-    // .. START: CROSS TRIGGER CONFIGURATIONS
-    // .. .. START: UNLOCKING CTI REGISTERS
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. FINISH: UNLOCKING CTI REGISTERS
-    // .. .. START: ENABLING CTI MODULES AND CHANNELS
-    // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
-    // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. FINISH: CROSS TRIGGER CONFIGURATIONS
-    // FINISH: top
-    //
-    EMIT_EXIT(),
-
-    //
-};
 
 unsigned long ps7_pll_init_data_2_0[] = {
     // START: top
@@ -8639,37 +8608,6 @@ unsigned long ps7_post_config_2_0[] = {
     //
 };
 
-unsigned long ps7_debug_2_0[] = {
-    // START: top
-    // .. START: CROSS TRIGGER CONFIGURATIONS
-    // .. .. START: UNLOCKING CTI REGISTERS
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. FINISH: UNLOCKING CTI REGISTERS
-    // .. .. START: ENABLING CTI MODULES AND CHANNELS
-    // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
-    // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. FINISH: CROSS TRIGGER CONFIGURATIONS
-    // FINISH: top
-    //
-    EMIT_EXIT(),
-
-    //
-};
 
 unsigned long ps7_pll_init_data_1_0[] = {
     // START: top
@@ -12983,37 +12921,6 @@ unsigned long ps7_post_config_1_0[] = {
     //
 };
 
-unsigned long ps7_debug_1_0[] = {
-    // START: top
-    // .. START: CROSS TRIGGER CONFIGURATIONS
-    // .. .. START: UNLOCKING CTI REGISTERS
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. FINISH: UNLOCKING CTI REGISTERS
-    // .. .. START: ENABLING CTI MODULES AND CHANNELS
-    // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
-    // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. FINISH: CROSS TRIGGER CONFIGURATIONS
-    // FINISH: top
-    //
-    EMIT_EXIT(),
-
-    //
-};
 
 
 #include "xil_io.h"
@@ -13176,25 +13083,6 @@ ps7_post_config()
   return PS7_INIT_SUCCESS;
 }
 
-int
-ps7_debug()
-{
-  // Get the PS_VERSION on run time
-  unsigned long si_ver = ps7GetSiliconVersion ();
-  int ret = -1;
-  if (si_ver == PCW_SILICON_VERSION_1) {
-      ret = ps7_config (ps7_debug_1_0);
-      if (ret != PS7_INIT_SUCCESS) return ret;
-  } else if (si_ver == PCW_SILICON_VERSION_2) {
-      ret = ps7_config (ps7_debug_2_0);
-      if (ret != PS7_INIT_SUCCESS) return ret;
-  } else {
-      ret = ps7_config (ps7_debug_3_0);
-      if (ret != PS7_INIT_SUCCESS) return ret;
-  }
-  return PS7_INIT_SUCCESS;
-}
-
 int
 ps7_init()
 {

+ 0 - 1
board/xilinx/zynq/zynq-zc702/ps7_init_gpl.h

@@ -104,7 +104,6 @@ extern unsigned long  * ps7_peripherals_init_data;
 int ps7_config( unsigned long*);
 int ps7_init();
 int ps7_post_config();
-int ps7_debug();
 char* getPS7MessageInfo(unsigned key);
 
 void perf_start_clock(void);

+ 0 - 112
board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c

@@ -4197,37 +4197,6 @@ unsigned long ps7_post_config_3_0[] = {
     //
 };
 
-unsigned long ps7_debug_3_0[] = {
-    // START: top
-    // .. START: CROSS TRIGGER CONFIGURATIONS
-    // .. .. START: UNLOCKING CTI REGISTERS
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. FINISH: UNLOCKING CTI REGISTERS
-    // .. .. START: ENABLING CTI MODULES AND CHANNELS
-    // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
-    // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. FINISH: CROSS TRIGGER CONFIGURATIONS
-    // FINISH: top
-    //
-    EMIT_EXIT(),
-
-    //
-};
 
 unsigned long ps7_pll_init_data_2_0[] = {
     // START: top
@@ -8577,37 +8546,6 @@ unsigned long ps7_post_config_2_0[] = {
     //
 };
 
-unsigned long ps7_debug_2_0[] = {
-    // START: top
-    // .. START: CROSS TRIGGER CONFIGURATIONS
-    // .. .. START: UNLOCKING CTI REGISTERS
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. FINISH: UNLOCKING CTI REGISTERS
-    // .. .. START: ENABLING CTI MODULES AND CHANNELS
-    // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
-    // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. FINISH: CROSS TRIGGER CONFIGURATIONS
-    // FINISH: top
-    //
-    EMIT_EXIT(),
-
-    //
-};
 
 unsigned long ps7_pll_init_data_1_0[] = {
     // START: top
@@ -12890,37 +12828,6 @@ unsigned long ps7_post_config_1_0[] = {
     //
 };
 
-unsigned long ps7_debug_1_0[] = {
-    // START: top
-    // .. START: CROSS TRIGGER CONFIGURATIONS
-    // .. .. START: UNLOCKING CTI REGISTERS
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. FINISH: UNLOCKING CTI REGISTERS
-    // .. .. START: ENABLING CTI MODULES AND CHANNELS
-    // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
-    // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. FINISH: CROSS TRIGGER CONFIGURATIONS
-    // FINISH: top
-    //
-    EMIT_EXIT(),
-
-    //
-};
 
 
 #include "xil_io.h"
@@ -13083,25 +12990,6 @@ ps7_post_config()
   return PS7_INIT_SUCCESS;
 }
 
-int
-ps7_debug()
-{
-  // Get the PS_VERSION on run time
-  unsigned long si_ver = ps7GetSiliconVersion ();
-  int ret = -1;
-  if (si_ver == PCW_SILICON_VERSION_1) {
-      ret = ps7_config (ps7_debug_1_0);
-      if (ret != PS7_INIT_SUCCESS) return ret;
-  } else if (si_ver == PCW_SILICON_VERSION_2) {
-      ret = ps7_config (ps7_debug_2_0);
-      if (ret != PS7_INIT_SUCCESS) return ret;
-  } else {
-      ret = ps7_config (ps7_debug_3_0);
-      if (ret != PS7_INIT_SUCCESS) return ret;
-  }
-  return PS7_INIT_SUCCESS;
-}
-
 int
 ps7_init()
 {

+ 0 - 1
board/xilinx/zynq/zynq-zc706/ps7_init_gpl.h

@@ -104,7 +104,6 @@ extern unsigned long  * ps7_peripherals_init_data;
 int ps7_config( unsigned long*);
 int ps7_init();
 int ps7_post_config();
-int ps7_debug();
 char* getPS7MessageInfo(unsigned key);
 
 void perf_start_clock(void);

+ 0 - 112
board/xilinx/zynq/zynq-zed/ps7_init_gpl.c

@@ -4087,37 +4087,6 @@ unsigned long ps7_post_config_3_0[] = {
     //
 };
 
-unsigned long ps7_debug_3_0[] = {
-    // START: top
-    // .. START: CROSS TRIGGER CONFIGURATIONS
-    // .. .. START: UNLOCKING CTI REGISTERS
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. FINISH: UNLOCKING CTI REGISTERS
-    // .. .. START: ENABLING CTI MODULES AND CHANNELS
-    // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
-    // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. FINISH: CROSS TRIGGER CONFIGURATIONS
-    // FINISH: top
-    //
-    EMIT_EXIT(),
-
-    //
-};
 
 unsigned long ps7_pll_init_data_2_0[] = {
     // START: top
@@ -8351,37 +8320,6 @@ unsigned long ps7_post_config_2_0[] = {
     //
 };
 
-unsigned long ps7_debug_2_0[] = {
-    // START: top
-    // .. START: CROSS TRIGGER CONFIGURATIONS
-    // .. .. START: UNLOCKING CTI REGISTERS
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. FINISH: UNLOCKING CTI REGISTERS
-    // .. .. START: ENABLING CTI MODULES AND CHANNELS
-    // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
-    // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. FINISH: CROSS TRIGGER CONFIGURATIONS
-    // FINISH: top
-    //
-    EMIT_EXIT(),
-
-    //
-};
 
 unsigned long ps7_pll_init_data_1_0[] = {
     // START: top
@@ -12548,37 +12486,6 @@ unsigned long ps7_post_config_1_0[] = {
     //
 };
 
-unsigned long ps7_debug_1_0[] = {
-    // START: top
-    // .. START: CROSS TRIGGER CONFIGURATIONS
-    // .. .. START: UNLOCKING CTI REGISTERS
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. KEY = 0XC5ACCE55
-    // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
-    // .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U
-    // .. ..
-    EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU ,0xC5ACCE55U),
-    // .. .. FINISH: UNLOCKING CTI REGISTERS
-    // .. .. START: ENABLING CTI MODULES AND CHANNELS
-    // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
-    // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
-    // .. FINISH: CROSS TRIGGER CONFIGURATIONS
-    // FINISH: top
-    //
-    EMIT_EXIT(),
-
-    //
-};
 
 
 #include "xil_io.h"
@@ -12741,25 +12648,6 @@ ps7_post_config()
   return PS7_INIT_SUCCESS;
 }
 
-int
-ps7_debug()
-{
-  // Get the PS_VERSION on run time
-  unsigned long si_ver = ps7GetSiliconVersion ();
-  int ret = -1;
-  if (si_ver == PCW_SILICON_VERSION_1) {
-      ret = ps7_config (ps7_debug_1_0);
-      if (ret != PS7_INIT_SUCCESS) return ret;
-  } else if (si_ver == PCW_SILICON_VERSION_2) {
-      ret = ps7_config (ps7_debug_2_0);
-      if (ret != PS7_INIT_SUCCESS) return ret;
-  } else {
-      ret = ps7_config (ps7_debug_3_0);
-      if (ret != PS7_INIT_SUCCESS) return ret;
-  }
-  return PS7_INIT_SUCCESS;
-}
-
 int
 ps7_init()
 {

+ 0 - 1
board/xilinx/zynq/zynq-zed/ps7_init_gpl.h

@@ -104,7 +104,6 @@ extern unsigned long  * ps7_peripherals_init_data;
 int ps7_config( unsigned long*);
 int ps7_init();
 int ps7_post_config();
-int ps7_debug();
 char* getPS7MessageInfo(unsigned key);
 
 void perf_start_clock(void);

+ 0 - 114
board/xilinx/zynq/zynq-zybo/ps7_init_gpl.c

@@ -4141,37 +4141,6 @@ unsigned long ps7_post_config_3_0[] = {
 	/* */
 };
 
-unsigned long ps7_debug_3_0[] = {
-	/* START: top */
-	/* .. START: CROSS TRIGGER CONFIGURATIONS */
-	/* .. .. START: UNLOCKING CTI REGISTERS */
-	/* .. .. KEY = 0XC5ACCE55 */
-	/* .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U */
-	/* .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U */
-	/* .. .. */
-	EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
-	/* .. .. KEY = 0XC5ACCE55 */
-	/* .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U */
-	/* .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U */
-	/* .. .. */
-	EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
-	/* .. .. KEY = 0XC5ACCE55 */
-	/* .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U */
-	/* .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U */
-	/* .. .. */
-	EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
-	/* .. .. FINISH: UNLOCKING CTI REGISTERS */
-	/* .. .. START: ENABLING CTI MODULES AND CHANNELS */
-	/* .. .. FINISH: ENABLING CTI MODULES AND CHANNELS */
-	/* .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS */
-	/* .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS */
-	/* .. FINISH: CROSS TRIGGER CONFIGURATIONS */
-	/* FINISH: top */
-	/* */
-	EMIT_EXIT(),
-
-	/* */
-};
 
 unsigned long ps7_pll_init_data_2_0[] = {
 	/* START: top */
@@ -8467,37 +8436,6 @@ unsigned long ps7_post_config_2_0[] = {
 	/* */
 };
 
-unsigned long ps7_debug_2_0[] = {
-	/* START: top */
-	/* .. START: CROSS TRIGGER CONFIGURATIONS */
-	/* .. .. START: UNLOCKING CTI REGISTERS */
-	/* .. .. KEY = 0XC5ACCE55 */
-	/* .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U */
-	/* .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U */
-	/* .. .. */
-	EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
-	/* .. .. KEY = 0XC5ACCE55 */
-	/* .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U */
-	/* .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U */
-	/* .. .. */
-	EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
-	/* .. .. KEY = 0XC5ACCE55 */
-	/* .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U */
-	/* .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U */
-	/* .. .. */
-	EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
-	/* .. .. FINISH: UNLOCKING CTI REGISTERS */
-	/* .. .. START: ENABLING CTI MODULES AND CHANNELS */
-	/* .. .. FINISH: ENABLING CTI MODULES AND CHANNELS */
-	/* .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS */
-	/* .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS */
-	/* .. FINISH: CROSS TRIGGER CONFIGURATIONS */
-	/* FINISH: top */
-	/* */
-	EMIT_EXIT(),
-
-	/* */
-};
 
 unsigned long ps7_pll_init_data_1_0[] = {
 	/* START: top */
@@ -12726,37 +12664,6 @@ unsigned long ps7_post_config_1_0[] = {
 	/* */
 };
 
-unsigned long ps7_debug_1_0[] = {
-	/* START: top */
-	/* .. START: CROSS TRIGGER CONFIGURATIONS */
-	/* .. .. START: UNLOCKING CTI REGISTERS */
-	/* .. .. KEY = 0XC5ACCE55 */
-	/* .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U */
-	/* .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U */
-	/* .. .. */
-	EMIT_MASKWRITE(0XF8898FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
-	/* .. .. KEY = 0XC5ACCE55 */
-	/* .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U */
-	/* .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U */
-	/* .. .. */
-	EMIT_MASKWRITE(0XF8899FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
-	/* .. .. KEY = 0XC5ACCE55 */
-	/* .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U */
-	/* .. ..     ==> MASK : 0xFFFFFFFFU    VAL : 0xC5ACCE55U */
-	/* .. .. */
-	EMIT_MASKWRITE(0XF8809FB0, 0xFFFFFFFFU, 0xC5ACCE55U),
-	/* .. .. FINISH: UNLOCKING CTI REGISTERS */
-	/* .. .. START: ENABLING CTI MODULES AND CHANNELS */
-	/* .. .. FINISH: ENABLING CTI MODULES AND CHANNELS */
-	/* .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS */
-	/* .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS */
-	/* .. FINISH: CROSS TRIGGER CONFIGURATIONS */
-	/* FINISH: top */
-	/* */
-	EMIT_EXIT(),
-
-	/* */
-};
 
 #include "xil_io.h"
 #define PS7_MASK_POLL_TIME 100000000
@@ -12926,27 +12833,6 @@ int ps7_post_config(void)
 	return PS7_INIT_SUCCESS;
 }
 
-int ps7_debug(void)
-{
-	/* Get the PS_VERSION on run time */
-	unsigned long si_ver = ps7GetSiliconVersion();
-	int ret = -1;
-	if (si_ver == PCW_SILICON_VERSION_1) {
-		ret = ps7_config(ps7_debug_1_0);
-		if (ret != PS7_INIT_SUCCESS)
-			return ret;
-	} else if (si_ver == PCW_SILICON_VERSION_2) {
-		ret = ps7_config(ps7_debug_2_0);
-		if (ret != PS7_INIT_SUCCESS)
-			return ret;
-	} else {
-		ret = ps7_config(ps7_debug_3_0);
-		if (ret != PS7_INIT_SUCCESS)
-			return ret;
-	}
-	return PS7_INIT_SUCCESS;
-}
-
 int ps7_init(void)
 {
 	/* Get the PS_VERSION on run time */

+ 0 - 1
board/xilinx/zynq/zynq-zybo/ps7_init_gpl.h

@@ -85,7 +85,6 @@ extern unsigned long *ps7_peripherals_init_data;
 int ps7_config(unsigned long *);
 int ps7_init(void);
 int ps7_post_config(void);
-int ps7_debug(void);
 char *getPS7MessageInfo(unsigned key);
 
 void perf_start_clock(void);