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@@ -351,6 +351,63 @@ config SYS_DISABLE_DCACHE_OPS
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Note that, its up to the individual architectures to implement
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this functionality.
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+config SKIP_LOWLEVEL_INIT
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+ bool "Skip the calls to certain low level initialization functions"
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+ depends on ARM || NDS32 || MIPS || RISCV
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+ help
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+ If enabled, then certain low level initializations (like setting up
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+ the memory controller) are omitted and/or U-Boot does not relocate
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+ itself into RAM.
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+ Normally this variable MUST NOT be defined. The only exception is
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+ when U-Boot is loaded (to RAM) by some other boot loader or by a
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+ debugger which performs these initializations itself.
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+
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+config SPL_SKIP_LOWLEVEL_INIT
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+ bool "Skip the calls to certain low level initialization functions"
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+ depends on SPL && (ARM || NDS32 || MIPS || RISCV)
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+ help
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+ If enabled, then certain low level initializations (like setting up
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+ the memory controller) are omitted and/or U-Boot does not relocate
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+ itself into RAM.
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+ Normally this variable MUST NOT be defined. The only exception is
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+ when U-Boot is loaded (to RAM) by some other boot loader or by a
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+ debugger which performs these initializations itself.
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+
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+config TPL_SKIP_LOWLEVEL_INIT
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+ bool "Skip the calls to certain low level initialization functions"
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+ depends on SPL && ARM
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+ help
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+ If enabled, then certain low level initializations (like setting up
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+ the memory controller) are omitted and/or U-Boot does not relocate
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+ itself into RAM.
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+ Normally this variable MUST NOT be defined. The only exception is
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+ when U-Boot is loaded (to RAM) by some other boot loader or by a
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+ debugger which performs these initializations itself.
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+
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+config SKIP_LOWLEVEL_INIT_ONLY
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+ bool "Skip the call to lowlevel_init during early boot ONLY"
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+ depends on ARM
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+ help
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+ This allows just the call to lowlevel_init() to be skipped. The
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+ normal CP15 init (such as enabling the instruction cache) is still
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+ performed.
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+
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+config SPL_SKIP_LOWLEVEL_INIT_ONLY
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+ bool "Skip the call to lowlevel_init during early boot ONLY"
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+ depends on SPL && ARM
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+ help
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+ This allows just the call to lowlevel_init() to be skipped. The
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+ normal CP15 init (such as enabling the instruction cache) is still
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+ performed.
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+
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+config TPL_SKIP_LOWLEVEL_INIT_ONLY
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+ bool "Skip the call to lowlevel_init during early boot ONLY"
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+ depends on TPL && ARM
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+ help
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+ This allows just the call to lowlevel_init() to be skipped. The
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+ normal CP15 init (such as enabling the instruction cache) is still
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+ performed.
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+
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source "arch/arc/Kconfig"
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source "arch/arm/Kconfig"
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source "arch/m68k/Kconfig"
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