Просмотр исходного кода

MIPS: convert CONFIG_SYS_MIPS_TIMER_FREQ to Kconfig

This converts the following to Kconfig:
    CONFIG_SYS_MIPS_TIMER_REQ

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Daniel Schwierzeck 1 год назад
Родитель
Сommit
a29491ade0
71 измененных файлов с 61 добавлено и 68 удалено
  1. 18 0
      arch/mips/Kconfig
  2. 1 0
      configs/ap121_defconfig
  3. 1 0
      configs/ap143_defconfig
  4. 1 0
      configs/ap152_defconfig
  5. 1 0
      configs/bcm968380gerg_ram_defconfig
  6. 1 0
      configs/boston32r2_defconfig
  7. 1 0
      configs/boston32r2el_defconfig
  8. 1 0
      configs/boston32r6_defconfig
  9. 1 0
      configs/boston32r6el_defconfig
  10. 1 0
      configs/boston64r2_defconfig
  11. 1 0
      configs/boston64r2el_defconfig
  12. 1 0
      configs/boston64r6_defconfig
  13. 1 0
      configs/boston64r6el_defconfig
  14. 1 0
      configs/ci20_mmc_defconfig
  15. 1 0
      configs/comtrend_ar5315u_ram_defconfig
  16. 1 0
      configs/comtrend_ar5387un_ram_defconfig
  17. 1 0
      configs/comtrend_ct5361_ram_defconfig
  18. 1 0
      configs/comtrend_vr3032u_ram_defconfig
  19. 1 0
      configs/comtrend_wap5813n_ram_defconfig
  20. 1 0
      configs/gardena-smart-gateway-mt7688_defconfig
  21. 1 0
      configs/huawei_hg556a_ram_defconfig
  22. 1 0
      configs/imgtec_xilfpga_defconfig
  23. 1 0
      configs/linkit-smart-7688_defconfig
  24. 1 0
      configs/malta64_defconfig
  25. 1 0
      configs/malta64el_defconfig
  26. 1 0
      configs/malta_defconfig
  27. 1 0
      configs/maltael_defconfig
  28. 1 0
      configs/mscc_jr2_defconfig
  29. 1 0
      configs/mscc_luton_defconfig
  30. 1 0
      configs/mscc_ocelot_defconfig
  31. 1 0
      configs/mscc_serval_defconfig
  32. 1 0
      configs/mscc_servalt_defconfig
  33. 1 0
      configs/mt7620_mt7530_rfb_defconfig
  34. 1 0
      configs/mt7620_rfb_defconfig
  35. 1 0
      configs/mt7621_nand_rfb_defconfig
  36. 1 0
      configs/mt7621_rfb_defconfig
  37. 1 0
      configs/mt7628_rfb_defconfig
  38. 1 0
      configs/netgear_cg3100d_ram_defconfig
  39. 1 0
      configs/netgear_dgnd3700v2_ram_defconfig
  40. 1 0
      configs/pic32mzdask_defconfig
  41. 1 0
      configs/sagem_f@st1704_ram_defconfig
  42. 1 0
      configs/sfr_nb4-ser_ram_defconfig
  43. 1 0
      configs/tplink_wdr4300_defconfig
  44. 1 0
      configs/vocore2_defconfig
  45. 0 2
      include/configs/ap121.h
  46. 0 2
      include/configs/ap143.h
  47. 0 2
      include/configs/ap152.h
  48. 0 3
      include/configs/bmips_bcm3380.h
  49. 0 3
      include/configs/bmips_bcm6318.h
  50. 0 3
      include/configs/bmips_bcm63268.h
  51. 0 3
      include/configs/bmips_bcm6328.h
  52. 0 3
      include/configs/bmips_bcm6338.h
  53. 0 3
      include/configs/bmips_bcm6348.h
  54. 0 3
      include/configs/bmips_bcm6358.h
  55. 0 3
      include/configs/bmips_bcm6362.h
  56. 0 3
      include/configs/bmips_bcm6368.h
  57. 0 3
      include/configs/bmips_bcm6838.h
  58. 0 1
      include/configs/boston.h
  59. 0 3
      include/configs/ci20.h
  60. 0 3
      include/configs/gardena-smart-gateway-mt7688.h
  61. 0 2
      include/configs/imgtec_xilfpga.h
  62. 0 3
      include/configs/linkit-smart-7688.h
  63. 0 1
      include/configs/malta.h
  64. 0 2
      include/configs/mt7620.h
  65. 0 2
      include/configs/mt7621.h
  66. 0 2
      include/configs/mt7628.h
  67. 0 2
      include/configs/pic32mzdask.h
  68. 0 2
      include/configs/tplink_wdr4300.h
  69. 0 5
      include/configs/vcoreiii.h
  70. 0 3
      include/configs/vocore2.h
  71. 0 1
      scripts/config_whitelist.txt

+ 18 - 0
arch/mips/Kconfig

@@ -14,6 +14,7 @@ choice
 
 config TARGET_MALTA
 	bool "Support malta"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select BOARD_EARLY_INIT_R
 	select DM
 	select DM_SERIAL
@@ -41,17 +42,20 @@ config TARGET_MALTA
 
 config ARCH_ATH79
 	bool "Support QCA/Atheros ath79"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select DM
 	select OF_CONTROL
 	imply CMD_DM
 
 config ARCH_MSCC
 	bool "Support MSCC VCore-III"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select OF_CONTROL
 	select DM
 
 config ARCH_BMIPS
 	bool "Support BMIPS SoCs"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select CLK
 	select CPU
 	select DM
@@ -62,6 +66,7 @@ config ARCH_BMIPS
 
 config ARCH_MTMIPS
 	bool "Support MediaTek MIPS platforms"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select CLK
 	imply CMD_DM
 	select DISPLAY_CPUINFO
@@ -88,6 +93,7 @@ config ARCH_MTMIPS
 config ARCH_JZ47XX
 	bool "Support Ingenic JZ47xx"
 	select SUPPORT_SPL
+	select HAS_FIXED_TIMER_FREQUENCY
 	select OF_CONTROL
 	select DM
 
@@ -116,12 +122,14 @@ config ARCH_OCTEON
 
 config MACH_PIC32
 	bool "Support Microchip PIC32"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select DM
 	select OF_CONTROL
 	imply CMD_DM
 
 config TARGET_BOSTON
 	bool "Support Boston"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select DM
 	imply DM_EVENT
 	select DM_SERIAL
@@ -143,6 +151,7 @@ config TARGET_BOSTON
 
 config TARGET_XILFPGA
 	bool "Support Imagination Xilfpga"
+	select HAS_FIXED_TIMER_FREQUENCY
 	select DM
 	select DM_ETH
 	select DM_GPIO
@@ -246,6 +255,12 @@ config ROM_EXCEPTION_VECTORS
 	  Disable this, if the U-Boot image is booted from DRAM (e.g. by SPL).
 	  In that case the image size will be reduced by 0x500 bytes.
 
+config SYS_MIPS_TIMER_FREQ
+	int "Fixed MIPS CPU timer frequency in Hz"
+	depends on HAS_FIXED_TIMER_FREQUENCY
+	help
+	  Configures a fixed CPU timer frequency.
+
 config MIPS_CM_BASE
 	hex "MIPS CM GCR Base Address"
 	depends on MIPS_CM
@@ -427,6 +442,9 @@ config SUPPORTS_CPU_MIPS64_R6
 config SUPPORTS_CPU_MIPS64_OCTEON
 	bool
 
+config HAS_FIXED_TIMER_FREQUENCY
+	bool
+
 config CPU_CAVIUM_OCTEON
 	bool
 

+ 1 - 0
configs/ap121_defconfig

@@ -11,6 +11,7 @@ CONFIG_DEBUG_UART_CLOCK=25000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ARCH_ATH79=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80100000
 CONFIG_SYS_MEMTEST_END=0x83f00000

+ 1 - 0
configs/ap143_defconfig

@@ -13,6 +13,7 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ARCH_ATH79=y
 CONFIG_TARGET_AP143=y
+CONFIG_SYS_MIPS_TIMER_FREQ=325000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80100000
 CONFIG_SYS_MEMTEST_END=0x83f00000

+ 1 - 0
configs/ap152_defconfig

@@ -13,6 +13,7 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ARCH_ATH79=y
 CONFIG_TARGET_AP152=y
+CONFIG_SYS_MIPS_TIMER_FREQ=375000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80100000
 CONFIG_SYS_MEMTEST_END=0x83f00000

+ 1 - 0
configs/bcm968380gerg_ram_defconfig

@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="bcm968380gerg # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6838=y
+CONFIG_SYS_MIPS_TIMER_FREQ=160000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set

+ 1 - 0
configs/boston32r2_defconfig

@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="boston # "
 CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y

+ 1 - 0
configs/boston32r2el_defconfig

@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="boston # "
 CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y

+ 1 - 0
configs/boston32r6_defconfig

@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS32_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y

+ 1 - 0
configs/boston32r6el_defconfig

@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0x88000000
 CONFIG_ENV_ADDR=0xBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS32_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y

+ 1 - 0
configs/boston64r2_defconfig

@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y

+ 1 - 0
configs/boston64r2el_defconfig

@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y

+ 1 - 0
configs/boston64r6_defconfig

@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS64_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y

+ 1 - 0
configs/boston64r6el_defconfig

@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff88000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBFFE0000
 CONFIG_TARGET_BOSTON=y
 CONFIG_CPU_MIPS64_R6=y
+CONFIG_SYS_MIPS_TIMER_FREQ=30000000
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y

+ 1 - 0
configs/ci20_mmc_defconfig

@@ -13,6 +13,7 @@ CONFIG_SPL_MMC=y
 CONFIG_SPL=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ARCH_JZ47XX=y
+CONFIG_SYS_MIPS_TIMER_FREQ=1200000000
 CONFIG_FIT=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS4,115200 rw rootwait root=/dev/mmcblk0p1"

+ 1 - 0
configs/comtrend_ar5315u_ram_defconfig

@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="AR-5315un # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6318=y
+CONFIG_SYS_MIPS_TIMER_FREQ=166500000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set

+ 1 - 0
configs/comtrend_ar5387un_ram_defconfig

@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="AR-5387un # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6328=y
+CONFIG_SYS_MIPS_TIMER_FREQ=160000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set

+ 1 - 0
configs/comtrend_ct5361_ram_defconfig

@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="CT-5361 # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6348=y
+CONFIG_SYS_MIPS_TIMER_FREQ=128000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set

+ 1 - 0
configs/comtrend_vr3032u_ram_defconfig

@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="VR-3032u # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM63268=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set

+ 1 - 0
configs/comtrend_wap5813n_ram_defconfig

@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="WAP-5813n # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6368=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set

+ 1 - 0
configs/gardena-smart-gateway-mt7688_defconfig

@@ -17,6 +17,7 @@ CONFIG_ENV_OFFSET_REDUND=0xB0000
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7628=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y

+ 1 - 0
configs/huawei_hg556a_ram_defconfig

@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="HG556a # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6358=y
+CONFIG_SYS_MIPS_TIMER_FREQ=150000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set

+ 1 - 0
configs/imgtec_xilfpga_defconfig

@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="nexys4ddr"
 CONFIG_SYS_PROMPT="MIPSfpga # "
 CONFIG_SYS_LOAD_ADDR=0x80500000
 CONFIG_TARGET_XILFPGA=y
+CONFIG_SYS_MIPS_TIMER_FREQ=50000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set

+ 1 - 0
configs/linkit-smart-7688_defconfig

@@ -15,6 +15,7 @@ CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7628=y
 CONFIG_BOARD_LINKIT_SMART_7688=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y

+ 1 - 0
configs/malta64_defconfig

@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0xffffffff81000000
 CONFIG_ENV_ADDR=0xFFFFFFFFBE3E0000
 CONFIG_TARGET_MALTA=y
 CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 # CONFIG_AUTOBOOT is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_MISC_INIT_R=y

+ 1 - 0
configs/malta64el_defconfig

@@ -11,6 +11,7 @@ CONFIG_ENV_ADDR=0xFFFFFFFFBE3E0000
 CONFIG_TARGET_MALTA=y
 CONFIG_BUILD_TARGET="u-boot-swap.bin"
 CONFIG_CPU_MIPS64_R2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_SYS_LITTLE_ENDIAN=y
 # CONFIG_AUTOBOOT is not set
 CONFIG_BOARD_EARLY_INIT_F=y

+ 1 - 0
configs/malta_defconfig

@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="malta # "
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ENV_ADDR=0xBE3E0000
 CONFIG_TARGET_MALTA=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 # CONFIG_AUTOBOOT is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_MISC_INIT_R=y

+ 1 - 0
configs/maltael_defconfig

@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_ENV_ADDR=0xBE3E0000
 CONFIG_TARGET_MALTA=y
 CONFIG_BUILD_TARGET="u-boot-swap.bin"
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_SYS_LITTLE_ENDIAN=y
 # CONFIG_AUTOBOOT is not set
 CONFIG_BOARD_EARLY_INIT_F=y

+ 1 - 0
configs/mscc_jr2_defconfig

@@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET_REDUND=0x140000
 CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
 CONFIG_SOC_JR2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80000000
 CONFIG_SYS_MEMTEST_END=0x9fc00000

+ 1 - 0
configs/mscc_luton_defconfig

@@ -15,6 +15,7 @@ CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
 CONFIG_SOC_LUTON=y
 CONFIG_DDRTYPE_MT47H128M8HQ=y
+CONFIG_SYS_MIPS_TIMER_FREQ=208333333
 CONFIG_MIPS_BOOT_FDT=y
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80000000

+ 1 - 0
configs/mscc_ocelot_defconfig

@@ -13,6 +13,7 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_ENV_OFFSET_REDUND=0x140000
 CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_DEBUG_UART=y
 CONFIG_SYS_MEMTEST_START=0x80000000
 CONFIG_SYS_MEMTEST_END=0x9fc00000

+ 1 - 0
configs/mscc_serval_defconfig

@@ -12,6 +12,7 @@ CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
 CONFIG_SOC_SERVAL=y
 CONFIG_DDRTYPE_H5TQ1G63BFA=y
+CONFIG_SYS_MIPS_TIMER_FREQ=208333333
 CONFIG_SYS_MEMTEST_START=0x80000000
 CONFIG_SYS_MEMTEST_END=0x87c00000
 CONFIG_SYS_LITTLE_ENDIAN=y

+ 1 - 0
configs/mscc_servalt_defconfig

@@ -11,6 +11,7 @@ CONFIG_ENV_OFFSET_REDUND=0x140000
 CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ARCH_MSCC=y
 CONFIG_SOC_SERVALT=y
+CONFIG_SYS_MIPS_TIMER_FREQ=250000000
 CONFIG_SYS_MEMTEST_START=0x80000000
 CONFIG_SYS_MEMTEST_END=0x9fc00000
 CONFIG_SYS_LITTLE_ENDIAN=y

+ 1 - 0
configs/mt7620_mt7530_rfb_defconfig

@@ -16,6 +16,7 @@ CONFIG_DEBUG_UART_CLOCK=40000000
 CONFIG_SYS_LOAD_ADDR=0x80010000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_BOARD_MT7620_MT7530_RFB=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y

+ 1 - 0
configs/mt7620_rfb_defconfig

@@ -15,6 +15,7 @@ CONFIG_DEBUG_UART_BASE=0xb0000c00
 CONFIG_DEBUG_UART_CLOCK=40000000
 CONFIG_SYS_LOAD_ADDR=0x80010000
 CONFIG_ARCH_MTMIPS=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y

+ 1 - 0
configs/mt7621_nand_rfb_defconfig

@@ -15,6 +15,7 @@ CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7621=y
 CONFIG_MT7621_BOOT_FROM_NAND=y
 CONFIG_BOARD_MT7621_NAND_RFB=y
+CONFIG_SYS_MIPS_TIMER_FREQ=440000000
 # CONFIG_MIPS_CACHE_SETUP is not set
 # CONFIG_MIPS_CACHE_DISABLE is not set
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y

+ 1 - 0
configs/mt7621_rfb_defconfig

@@ -13,6 +13,7 @@ CONFIG_DEBUG_UART_CLOCK=50000000
 CONFIG_SYS_LOAD_ADDR=0x83000000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7621=y
+CONFIG_SYS_MIPS_TIMER_FREQ=440000000
 # CONFIG_MIPS_CACHE_SETUP is not set
 # CONFIG_MIPS_CACHE_DISABLE is not set
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y

+ 1 - 0
configs/mt7628_rfb_defconfig

@@ -15,6 +15,7 @@ CONFIG_SYS_LOAD_ADDR=0x80010000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7628=y
 CONFIG_BOARD_MT7628_RFB=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y

+ 1 - 0
configs/netgear_cg3100d_ram_defconfig

@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="netgear,cg3100d"
 CONFIG_SYS_PROMPT="CG3100D # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
+CONFIG_SYS_MIPS_TIMER_FREQ=166500000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set

+ 1 - 0
configs/netgear_dgnd3700v2_ram_defconfig

@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="DGND3700v2 # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6362=y
+CONFIG_SYS_MIPS_TIMER_FREQ=200000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set

+ 1 - 0
configs/pic32mzdask_defconfig

@@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="pic32mzda_sk"
 CONFIG_SYS_PROMPT="dask # "
 CONFIG_SYS_LOAD_ADDR=0x88500000
 CONFIG_MACH_PIC32=y
+CONFIG_SYS_MIPS_TIMER_FREQ=100000000
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
 CONFIG_SYS_MEMTEST_START=0x88000000

+ 1 - 0
configs/sagem_f@st1704_ram_defconfig

@@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="F@ST1704 # "
 CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6338=y
+CONFIG_SYS_MIPS_TIMER_FREQ=120000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set

+ 1 - 0
configs/sfr_nb4-ser_ram_defconfig

@@ -10,6 +10,7 @@ CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_BMIPS=y
 CONFIG_SOC_BMIPS_BCM6358=y
 CONFIG_BOARD_SFR_NB4_SER=y
+CONFIG_SYS_MIPS_TIMER_FREQ=150000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set

+ 1 - 0
configs/tplink_wdr4300_defconfig

@@ -6,6 +6,7 @@ CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300"
 CONFIG_SYS_LOAD_ADDR=0xa1000000
 CONFIG_ARCH_ATH79=y
 CONFIG_BOARD_TPLINK_WDR4300=y
+CONFIG_SYS_MIPS_TIMER_FREQ=280000000
 CONFIG_SYS_MEMTEST_START=0x80100000
 CONFIG_SYS_MEMTEST_END=0x83f00000
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y

+ 1 - 0
configs/vocore2_defconfig

@@ -16,6 +16,7 @@ CONFIG_SYS_LOAD_ADDR=0x80100000
 CONFIG_ARCH_MTMIPS=y
 CONFIG_SOC_MT7628=y
 CONFIG_BOARD_VOCORE2=y
+CONFIG_SYS_MIPS_TIMER_FREQ=290000000
 CONFIG_MIPS_CACHE_SETUP=y
 CONFIG_MIPS_CACHE_DISABLE=y
 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y

+ 0 - 2
include/configs/ap121.h

@@ -6,8 +6,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ      200000000
-
 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR        0xbd000000

+ 0 - 2
include/configs/ap143.h

@@ -6,8 +6,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ      325000000
-
 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR        0xbd000000

+ 0 - 2
include/configs/ap152.h

@@ -6,8 +6,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ      375000000
-
 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR        0xbd000000

+ 0 - 3
include/configs/bmips_bcm3380.h

@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	166500000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 

+ 0 - 3
include/configs/bmips_bcm6318.h

@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	166500000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 

+ 0 - 3
include/configs/bmips_bcm63268.h

@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 

+ 0 - 3
include/configs/bmips_bcm6328.h

@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	160000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 

+ 0 - 3
include/configs/bmips_bcm6338.h

@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	120000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 

+ 0 - 3
include/configs/bmips_bcm6348.h

@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	128000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 

+ 0 - 3
include/configs/bmips_bcm6358.h

@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	150000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 

+ 0 - 3
include/configs/bmips_bcm6362.h

@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 

+ 0 - 3
include/configs/bmips_bcm6368.h

@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 

+ 0 - 3
include/configs/bmips_bcm6838.h

@@ -8,9 +8,6 @@
 
 #include <linux/sizes.h>
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	160000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 

+ 0 - 1
include/configs/boston.h

@@ -13,7 +13,6 @@
 /*
  * CPU
  */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	30000000
 
 /*
  * PCI

+ 0 - 3
include/configs/ci20.h

@@ -9,9 +9,6 @@
 #ifndef __CONFIG_CI20_H__
 #define __CONFIG_CI20_H__
 
-/* Ingenic JZ4780 clock configuration. */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	1200000000
-
 /* Memory configuration */
 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
 

+ 0 - 3
include/configs/gardena-smart-gateway-mt7688.h

@@ -6,9 +6,6 @@
 #ifndef __CONFIG_GARDENA_SMART_GATEWAY_H
 #define __CONFIG_GARDENA_SMART_GATEWAY_H
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 

+ 0 - 2
include/configs/imgtec_xilfpga.h

@@ -15,8 +15,6 @@
 /*--------------------------------------------
  * CPU configuration
  */
-/* CPU Timer rate */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	50000000
 
 /*----------------------------------------------------------------------
  * Memory Layout

+ 0 - 3
include/configs/linkit-smart-7688.h

@@ -6,9 +6,6 @@
 #ifndef __CONFIG_LINKIT_SMART_7688_H
 #define __CONFIG_LINKIT_SMART_7688_H
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 

+ 0 - 1
include/configs/malta.h

@@ -18,7 +18,6 @@
 /*
  * CPU Configuration
  */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	250000000
 
 /*
  * Memory map

+ 0 - 2
include/configs/mt7620.h

@@ -8,8 +8,6 @@
 #ifndef __CONFIG_MT7620_H
 #define __CONFIG_MT7620_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
 #define CONFIG_SYS_INIT_SP_OFFSET	0x400000

+ 0 - 2
include/configs/mt7621.h

@@ -8,8 +8,6 @@
 #ifndef __CONFIG_MT7621_H
 #define __CONFIG_MT7621_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ	440000000
-
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
 #define CONFIG_VERY_BIG_RAM

+ 0 - 2
include/configs/mt7628.h

@@ -8,8 +8,6 @@
 #ifndef __CONFIG_MT7628_H
 #define __CONFIG_MT7628_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
 #define CONFIG_SYS_INIT_SP_OFFSET	0x80000

+ 0 - 2
include/configs/pic32mzdask.h

@@ -13,8 +13,6 @@
 /*--------------------------------------------
  * CPU configuration
  */
-/* CPU Timer rate */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	100000000
 
 /*----------------------------------------------------------------------
  * Memory Layout

+ 0 - 2
include/configs/tplink_wdr4300.h

@@ -6,8 +6,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_MIPS_TIMER_FREQ	280000000
-
 #define CONFIG_SYS_SDRAM_BASE		0xa0000000
 
 #define CONFIG_SYS_INIT_RAM_ADDR	0xbd000000

+ 0 - 5
include/configs/vcoreiii.h

@@ -12,11 +12,6 @@
 
 #define CONFIG_SYS_INIT_SP_OFFSET       0x400000
 
-#if defined(CONFIG_SOC_LUTON) || defined(CONFIG_SOC_SERVAL)
-#define CONFIG_SYS_MIPS_TIMER_FREQ	208333333
-#else
-#define CONFIG_SYS_MIPS_TIMER_FREQ	250000000
-#endif
 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_MIPS_TIMER_FREQ
 
 #define CONFIG_SYS_SDRAM_BASE		0x80000000

+ 0 - 3
include/configs/vocore2.h

@@ -6,9 +6,6 @@
 #ifndef __VOCORE2_CONFIG_H__
 #define __VOCORE2_CONFIG_H__
 
-/* CPU */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	290000000
-
 /* RAM */
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 

+ 0 - 1
scripts/config_whitelist.txt

@@ -872,7 +872,6 @@ CONFIG_SYS_MDIO1_OFFSET
 CONFIG_SYS_MEMORY_BASE
 CONFIG_SYS_MEM_RESERVE_SECURE
 CONFIG_SYS_MFD
-CONFIG_SYS_MIPS_TIMER_FREQ
 CONFIG_SYS_MMC_CD_PIN
 CONFIG_SYS_MMC_CLK_OD
 CONFIG_SYS_MMC_MAX_BLK_COUNT