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@@ -4,9 +4,54 @@
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*/
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#include <common.h>
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-
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+#include <asm/io.h>
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+#include <clk.h>
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+#include <dm.h>
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+#include <dm/ofnode.h>
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+#include <generic-phy.h>
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+#include <reset.h>
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+#include "ohci.h"
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#include <asm/arch/da8xx-usb.h>
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+struct da8xx_ohci {
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+ ohci_t ohci;
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+ struct clk *clocks; /* clock list */
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+ struct phy phy;
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+ int clock_count; /* number of clock in clock list */
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+};
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+
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+static int usb_phy_on(void)
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+{
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+ unsigned long timeout;
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+
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+ clrsetbits_le32(&davinci_syscfg_regs->cfgchip2,
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+ (CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN |
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+ CFGCHIP2_OTGPWRDN | CFGCHIP2_OTGMODE |
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+ CFGCHIP2_REFFREQ | CFGCHIP2_USB1PHYCLKMUX),
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+ (CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN |
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+ CFGCHIP2_PHY_PLLON | CFGCHIP2_REFFREQ_24MHZ |
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+ CFGCHIP2_USB2PHYCLKMUX | CFGCHIP2_USB1SUSPENDM));
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+
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+ /* wait until the usb phy pll locks */
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+ timeout = get_timer(0);
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+ while (get_timer(timeout) < 10) {
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+ if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
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+ return 1;
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+ }
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+
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+ /* USB phy was not turned on */
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+ return 0;
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+}
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+
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+static void usb_phy_off(void)
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+{
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+ /* Power down the on-chip PHY. */
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+ clrsetbits_le32(&davinci_syscfg_regs->cfgchip2,
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+ CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM,
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+ CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
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+ CFGCHIP2_RESET);
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+}
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+
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int usb_cpu_init(void)
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{
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/* enable psc for usb2.0 */
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@@ -37,3 +82,94 @@ int usb_cpu_init_fail(void)
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{
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return usb_cpu_stop();
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}
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+
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+#if CONFIG_IS_ENABLED(DM_USB)
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+static int ohci_da8xx_probe(struct udevice *dev)
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+{
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+ struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev);
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+ struct da8xx_ohci *priv = dev_get_priv(dev);
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+ int i, err, ret, clock_nb;
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+
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+ err = 0;
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+ priv->clock_count = 0;
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+ clock_nb = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
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+ if (clock_nb > 0) {
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+ priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk),
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+ GFP_KERNEL);
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+ if (!priv->clocks)
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+ return -ENOMEM;
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+
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+ for (i = 0; i < clock_nb; i++) {
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+ err = clk_get_by_index(dev, i, &priv->clocks[i]);
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+ if (err < 0)
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+ break;
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+
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+ err = clk_enable(&priv->clocks[i]);
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+ if (err) {
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+ dev_err(dev, "failed to enable clock %d\n", i);
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+ clk_free(&priv->clocks[i]);
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+ goto clk_err;
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+ }
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+ priv->clock_count++;
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+ }
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+ } else if (clock_nb != -ENOENT) {
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+ dev_err(dev, "failed to get clock phandle(%d)\n", clock_nb);
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+ return clock_nb;
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+ }
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+
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+ err = usb_cpu_init();
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+
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+ if (err)
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+ goto clk_err;
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+
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+ err = ohci_register(dev, regs);
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+ if (err)
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+ goto phy_err;
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+
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+ return 0;
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+
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+phy_err:
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+ ret = usb_cpu_stop();
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+ if (ret)
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+ dev_err(dev, "failed to shutdown usb phy\n");
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+
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+clk_err:
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+ ret = clk_release_all(priv->clocks, priv->clock_count);
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+ if (ret)
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+ dev_err(dev, "failed to disable all clocks\n");
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+
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+ return err;
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+}
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+
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+static int ohci_da8xx_remove(struct udevice *dev)
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+{
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+ struct da8xx_ohci *priv = dev_get_priv(dev);
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+ int ret;
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+
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+ ret = ohci_deregister(dev);
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+ if (ret)
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+ return ret;
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+
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+ ret = usb_cpu_stop();
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+ if (ret)
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+ return ret;
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+
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+ return clk_release_all(priv->clocks, priv->clock_count);
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+}
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+
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+static const struct udevice_id da8xx_ohci_ids[] = {
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+ { .compatible = "ti,da830-ohci" },
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+ { }
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+};
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+
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+U_BOOT_DRIVER(ohci_generic) = {
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+ .name = "ohci-da8xx",
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+ .id = UCLASS_USB,
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+ .of_match = da8xx_ohci_ids,
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+ .probe = ohci_da8xx_probe,
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+ .remove = ohci_da8xx_remove,
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+ .ops = &ohci_usb_ops,
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+ .priv_auto_alloc_size = sizeof(struct da8xx_ohci),
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+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
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+};
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+#endif
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