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Merge tag 'u-boot-rockchip-20191124' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

- Clean vid/pid in Kconfig and add fastboot for rk3399
- add 'u-boot, spl-fifo-mode' for mmc
- Use FIT generator for rk3229 optee and rk3368 ATF
- fan53555: add support for Silergy SYR82X and SYR83X
Tom Rini 4 years ago
parent
commit
9a0cbae22a

+ 1 - 1
Kconfig

@@ -252,7 +252,7 @@ config BUILD_TARGET
 	default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5
 	default "u-boot-spl.kwb" if ARCH_MVEBU && SPL
 	default "u-boot-elf.srec" if RCAR_GEN3
-	default "u-boot.itb" if SPL_LOAD_FIT && (ROCKCHIP_RK3399 || \
+	default "u-boot.itb" if SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
 				ARCH_SUNXI || RISCV)
 	default "u-boot.kwb" if KIRKWOOD
 	default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT

+ 5 - 2
arch/arm/dts/px30-evb-u-boot.dtsi

@@ -31,12 +31,15 @@
 &sdmmc {
 	u-boot,dm-pre-reloc;
 
-	/* temporary till I find out why dma mode doesn't work */
-	fifo-mode;
+	/* mmc to sram can't do dma, prevent aborts transfering TF-A parts */
+	u-boot,spl-fifo-mode;
 };
 
 &emmc {
 	u-boot,dm-pre-reloc;
+
+	/* mmc to sram can't do dma, prevent aborts transfering TF-A parts */
+	u-boot,spl-fifo-mode;
 };
 
 &grf {

+ 30 - 2
arch/arm/mach-rockchip/board.c

@@ -49,8 +49,10 @@ void enable_caches(void)
 }
 #endif
 
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#if defined(CONFIG_USB_GADGET)
 #include <usb.h>
+
+#if defined(CONFIG_USB_GADGET_DWC2_OTG)
 #include <usb/dwc2_udc.h>
 
 static struct dwc2_plat_otg_data otg_data = {
@@ -117,7 +119,33 @@ int board_usb_cleanup(int index, enum usb_init_type init)
 {
 	return 0;
 }
-#endif
+#endif /* CONFIG_USB_GADGET_DWC2_OTG */
+
+#if defined(CONFIG_USB_DWC3_GADGET) && !defined(CONFIG_DM_USB_GADGET)
+#include <dwc3-uboot.h>
+
+static struct dwc3_device dwc3_device_data = {
+	.maximum_speed = USB_SPEED_HIGH,
+	.base = 0xfe800000,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 0,
+	.dis_u2_susphy_quirk = 1,
+	.hsphy_mode = USBPHY_INTERFACE_MODE_UTMIW,
+};
+
+int usb_gadget_handle_interrupts(void)
+{
+	dwc3_uboot_handle_interrupt(0);
+	return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	return dwc3_uboot_init(&dwc3_device_data);
+}
+#endif /* CONFIG_USB_DWC3_GADGET */
+
+#endif /* CONFIG_USB_GADGET */
 
 #if CONFIG_IS_ENABLED(FASTBOOT)
 int fastboot_set_reboot_flag(void)

+ 0 - 50
arch/arm/mach-rockchip/fit_spl_optee.its

@@ -1,50 +0,0 @@
-/*
- * Copyright (C) 2017 Rockchip Electronic Co.,Ltd
- *
- * Simple U-boot fit source file containing U-Boot, dtb and optee
- */
-
-/dts-v1/;
-
-/ {
-	description = "Simple image with OP-TEE support";
-	#address-cells = <1>;
-
-	images {
-		uboot {
-			description = "U-Boot";
-			data = /incbin/("../../../u-boot-nodtb.bin");
-			type = "standalone";
-			os = "U-Boot";
-			arch = "arm";
-			compression = "none";
-			load = <0x61000000>;
-		};
-		optee {
-			description = "OP-TEE";
-			data = /incbin/("../../../tee.bin");
-			type = "firmware";
-			arch = "arm";
-			os = "tee";
-			compression = "none";
-			load = <0x68400000>;
-			entry = <0x68400000>;
-		};
-		fdt {
-			description = "dtb";
-			data = /incbin/("../../../u-boot.dtb");
-			type = "flat_dt";
-			compression = "none";
-		};
-	};
-
-	configurations {
-		default = "conf";
-		conf {
-			description = "Rockchip armv7 with OP-TEE";
-			firmware = "optee";
-			loadables = "uboot";
-			fdt = "fdt";
-		};
-	};
-};

+ 78 - 0
arch/arm/mach-rockchip/fit_spl_optee.sh

@@ -0,0 +1,78 @@
+#!/bin/sh
+# SPDX-License-Identifier:      GPL-2.0+
+#
+# Copyright (C) 2019 Rockchip Electronic Co.,Ltd
+#
+# Script to generate FIT image source for 32-bit Rockchip SoCs with
+# U-Boot proper, OPTEE, and devicetree.
+#
+# usage: $0 <dt_name>
+
+[ -z "$TEE" ] && TEE="tee.bin"
+
+if [ ! -f $TEE ]; then
+	echo "WARNING: TEE file $TEE NOT found, U-Boot.itb is non-functional" >&2
+	echo "Please export path for TEE or copy tee.bin to U-Boot folder" >&2
+	TEE=/dev/null
+fi
+
+dtname=$1
+
+cat << __HEADER_EOF
+/*
+ * Copyright (C) 2017-2019 Rockchip Electronic Co.,Ltd
+ *
+ * Simple U-boot FIT source file containing U-Boot, dtb and optee
+ */
+
+/dts-v1/;
+
+/ {
+	description = "FIT image with OP-TEE support";
+	#address-cells = <1>;
+
+	images {
+		uboot {
+			description = "U-Boot";
+			data = /incbin/("u-boot-nodtb.bin");
+			type = "standalone";
+			os = "U-Boot";
+			arch = "arm";
+			compression = "none";
+			load = <0x61000000>;
+		};
+		optee {
+			description = "OP-TEE";
+			data = /incbin/("$TEE");
+			type = "firmware";
+			arch = "arm";
+			os = "tee";
+			compression = "none";
+			load = <0x68400000>;
+			entry = <0x68400000>;
+		};
+		fdt {
+			description = "$(basename $dtname .dtb)";
+			data = /incbin/("$dtname");
+			type = "flat_dt";
+			compression = "none";
+		};
+__HEADER_EOF
+
+cat << __CONF_HEADER_EOF
+	};
+
+	configurations {
+		default = "conf";
+		conf {
+			description = "$(basename $dtname .dtb)";
+			firmware = "optee";
+			loadables = "uboot";
+			fdt = "fdt";
+		};
+__CONF_HEADER_EOF
+
+cat << __ITS_EOF
+	};
+};
+__ITS_EOF

+ 0 - 52
board/theobroma-systems/lion_rk3368/fit_spl_atf.its

@@ -1,52 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ OR X11 */
-/*
- * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
- *
- * Minimal dts for a SPL FIT image payload.
- */
-
-/dts-v1/;
-
-/ {
-	description = "FIT image with U-Boot proper, ATF bl31, DTB";
-	#address-cells = <1>;
-
-	images {
-		uboot {
-			description = "U-Boot (64-bit)";
-			data = /incbin/("../../../u-boot-nodtb.bin");
-			type = "standalone";
-			os = "U-Boot";
-			arch = "arm64";
-			compression = "none";
-			load = <0x00200000>;
-		};
-		atf {
-			description = "ARM Trusted Firmware";
-			data = /incbin/("../../../bl31-rk3368.bin");
-			type = "firmware";
-			os = "arm-trusted-firmware";
-			arch = "arm64";
-			compression = "none";
-			load = <0x00100000>;
-			entry = <0x00100000>;
-		};
-
-		fdt {
-			description = "RK3368-uQ7 (Lion) flat device-tree";
-			data = /incbin/("../../../u-boot.dtb");
-			type = "flat_dt";
-			compression = "none";
-		};
-	};
-
-	configurations {
-		default = "conf";
-		conf {
-			description = "Theobroma Systems RK3368-uQ7 (Puma) SoM";
-			firmware = "atf";
-			loadables = "uboot";
-			fdt = "fdt";
-		};
-	};
-};

+ 0 - 2
configs/elgin-rv1108_defconfig

@@ -51,8 +51,6 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x110a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_ERRNO_STR=y

+ 0 - 5
configs/evb-rk3036_defconfig

@@ -36,8 +36,6 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 # CONFIG_SPL_BLK is not set
 CONFIG_CLK=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -53,9 +51,6 @@ CONFIG_SYSRESET=y
 # CONFIG_SPL_SYSRESET is not set
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x310a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_CMD_DHRYSTONE=y

+ 0 - 2
configs/evb-rk3128_defconfig

@@ -25,8 +25,6 @@ CONFIG_SYSCON=y
 CONFIG_CLK=y
 CONFIG_FASTBOOT_BUF_ADDR=0x60800800
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y

+ 1 - 6
configs/evb-rk3229_defconfig

@@ -15,7 +15,7 @@ CONFIG_SPL_TEXT_BASE=0x60000000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="arch/arm/mach-rockchip/fit_spl_optee.its"
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/fit_spl_optee.sh"
 CONFIG_USE_PREBOOT=y
 CONFIG_DEFAULT_FDT_FILE="rk3229-evb.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
@@ -46,8 +46,6 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_TPL_CLK=y
 CONFIG_FASTBOOT_BUF_SIZE=0x04000000
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -66,9 +64,6 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_TPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

+ 0 - 5
configs/evb-rk3288_defconfig

@@ -45,8 +45,6 @@ CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -73,9 +71,6 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_ROCKCHIP_USB2_PHY=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y

+ 0 - 5
configs/evb-rk3328_defconfig

@@ -48,8 +48,6 @@ CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -88,9 +86,6 @@ CONFIG_USB_DWC2=y
 CONFIG_USB_DWC3=y
 # CONFIG_USB_DWC3_GADGET is not set
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y

+ 0 - 2
configs/evb-rv1108_defconfig

@@ -45,8 +45,6 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x110a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_ERRNO_STR=y

+ 0 - 5
configs/firefly-rk3288_defconfig

@@ -46,8 +46,6 @@ CONFIG_SPL_SYSCON=y
 # CONFIG_SPL_SIMPLE_BUS is not set
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -77,9 +75,6 @@ CONFIG_USB_DWC2=y
 CONFIG_ROCKCHIP_USB2_PHY=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y

+ 0 - 5
configs/kylin-rk3036_defconfig

@@ -39,8 +39,6 @@ CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 # CONFIG_SPL_BLK is not set
 CONFIG_CLK=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -58,9 +56,6 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x310a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y

+ 0 - 1
configs/lion-rk3368_defconfig

@@ -21,7 +21,6 @@ CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/lion_rk3368/fit_spl_atf.its"
 CONFIG_BOOTSTAGE=y
 CONFIG_SPL_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y

+ 0 - 5
configs/miqi-rk3288_defconfig

@@ -47,8 +47,6 @@ CONFIG_SPL_SYSCON=y
 # CONFIG_SPL_SIMPLE_BUS is not set
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -73,9 +71,6 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_ROCKCHIP_USB2_PHY=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y

+ 0 - 5
configs/phycore-rk3288_defconfig

@@ -49,8 +49,6 @@ CONFIG_SPL_SYSCON=y
 # CONFIG_SPL_SIMPLE_BUS is not set
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -77,9 +75,6 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_ROCKCHIP_USB2_PHY=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y

+ 0 - 5
configs/popmetal-rk3288_defconfig

@@ -47,8 +47,6 @@ CONFIG_SPL_SYSCON=y
 # CONFIG_SPL_SIMPLE_BUS is not set
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -73,9 +71,6 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_ROCKCHIP_USB2_PHY=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y

+ 0 - 2
configs/rock2_defconfig

@@ -74,8 +74,6 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_ROCKCHIP_USB2_PHY=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_DM_VIDEO=y

+ 0 - 5
configs/rock64-rk3328_defconfig

@@ -50,8 +50,6 @@ CONFIG_TPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_FASTBOOT_BUF_ADDR=0x800800
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -89,9 +87,6 @@ CONFIG_USB_DWC2=y
 CONFIG_USB_DWC3=y
 # CONFIG_USB_DWC3_GADGET is not set
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y

+ 3 - 0
configs/rock960-rk3399_defconfig

@@ -57,5 +57,8 @@ CONFIG_USB_ETHER_ASIX88179=y
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_DWC3=y
+CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y

+ 0 - 5
configs/tinker-rk3288_defconfig

@@ -49,8 +49,6 @@ CONFIG_SPL_SYSCON=y
 # CONFIG_SPL_SIMPLE_BUS is not set
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -79,9 +77,6 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_ROCKCHIP_USB2_PHY=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y

+ 0 - 5
configs/tinker-s-rk3288_defconfig

@@ -49,8 +49,6 @@ CONFIG_SPL_SYSCON=y
 # CONFIG_SPL_SIMPLE_BUS is not set
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
@@ -79,9 +77,6 @@ CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_ROCKCHIP_USB2_PHY=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y

+ 0 - 3
configs/vyasa-rk3288_defconfig

@@ -71,9 +71,6 @@ CONFIG_USB_DWC2=y
 CONFIG_ROCKCHIP_USB2_PHY=y
 CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
-CONFIG_USB_GADGET_VENDOR_NUM=0x2207
-CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_USB_HOST_ETHER=y

+ 2 - 1
drivers/fastboot/Kconfig

@@ -64,7 +64,7 @@ config FASTBOOT_USB_DEV
 
 config FASTBOOT_FLASH
 	bool "Enable FASTBOOT FLASH command"
-	default y if ARCH_SUNXI
+	default y if ARCH_SUNXI || ARCH_ROCKCHIP
 	depends on MMC || (NAND && CMD_MTDPARTS)
 	select IMAGE_SPARSE
 	help
@@ -89,6 +89,7 @@ endchoice
 config FASTBOOT_FLASH_MMC_DEV
 	int "Define FASTBOOT MMC FLASH default device"
 	depends on FASTBOOT_FLASH_MMC
+	default 0 if ARCH_ROCKCHIP
 	default 0 if ARCH_SUNXI && MMC_SUNXI_SLOT_EXTRA = -1
 	default 1 if ARCH_SUNXI && MMC_SUNXI_SLOT_EXTRA != -1
 	help

+ 3 - 2
drivers/i2c/rk_i2c.c

@@ -253,7 +253,6 @@ static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 	}
 
 i2c_exit:
-	rk_i2c_send_stop_bit(i2c);
 	rk_i2c_disable(i2c);
 
 	return err;
@@ -332,7 +331,6 @@ static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
 	}
 
 i2c_exit:
-	rk_i2c_send_stop_bit(i2c);
 	rk_i2c_disable(i2c);
 
 	return err;
@@ -360,6 +358,9 @@ static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
 		}
 	}
 
+	rk_i2c_send_stop_bit(i2c);
+	rk_i2c_disable(i2c);
+
 	return 0;
 }
 

+ 5 - 0
drivers/mmc/rockchip_dw_mmc.c

@@ -72,6 +72,11 @@ static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
 		return -EINVAL;
 	priv->fifo_mode = dev_read_bool(dev, "fifo-mode");
 
+#ifdef CONFIG_SPL_BUILD
+	if (!priv->fifo_mode)
+		priv->fifo_mode = dev_read_bool(dev, "u-boot,spl-fifo-mode");
+#endif
+
 	/*
 	 * 'clock-freq-min-max' is deprecated
 	 * (see https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64c9f7b)

+ 5 - 2
drivers/power/pmic/fan53555.c

@@ -8,6 +8,7 @@
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <i2c.h>
+#include <power/fan53555.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 
@@ -58,7 +59,7 @@ static int pmic_fan53555_bind(struct udevice *dev)
 		return -ENOENT;
 	}
 
-	return device_bind_with_driver_data(dev, drv, "SW", 0,
+	return device_bind_with_driver_data(dev, drv, "SW", dev->driver_data,
 					    dev_ofnode(dev), &child);
 };
 
@@ -69,7 +70,9 @@ static struct dm_pmic_ops pmic_fan53555_ops = {
 };
 
 static const struct udevice_id pmic_fan53555_match[] = {
-	{ .compatible = "fcs,fan53555" },
+	{ .compatible = "fcs,fan53555", .data = FAN53555_VENDOR_FAIRCHILD, },
+	{ .compatible = "silergy,syr827", .data = FAN53555_VENDOR_SILERGY, },
+	{ .compatible = "silergy,syr828", .data = FAN53555_VENDOR_SILERGY, },
 	{ },
 };
 

+ 34 - 13
drivers/power/regulator/fan53555.c

@@ -10,6 +10,7 @@
 #include <fdtdec.h>
 #include <i2c.h>
 #include <asm/gpio.h>
+#include <power/fan53555.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 
@@ -27,21 +28,37 @@
  * See http://www.onsemi.com/pub/Collateral/FAN53555-D.pdf for details.
  */
 static const struct {
+	unsigned int vendor;
 	u8 die_id;
 	u8 die_rev;
+	bool check_rev;
 	u32 vsel_min;
 	u32 vsel_step;
 } ic_types[] = {
-	{ 0x0, 0x3, 600000, 10000 },  /* Option 00 */
-	{ 0x0, 0xf, 800000, 10000 },  /* Option 13 */
-	{ 0x0, 0xc, 600000, 12500 },  /* Option 23 */
-	{ 0x1, 0x3, 600000, 10000 },  /* Option 01 */
-	{ 0x3, 0x3, 600000, 10000 },  /* Option 03 */
-	{ 0x4, 0xf, 603000, 12826 },  /* Option 04 */
-	{ 0x5, 0x3, 600000, 10000 },  /* Option 05 */
-	{ 0x8, 0x1, 600000, 10000 },  /* Option 08 */
-	{ 0x8, 0xf, 600000, 10000 },  /* Option 08 */
-	{ 0xc, 0xf, 603000, 12826 },  /* Option 09 */
+	/* Option 00 */
+	{ FAN53555_VENDOR_FAIRCHILD, 0x0, 0x3, true,  600000, 10000 },
+	/* Option 13 */
+	{ FAN53555_VENDOR_FAIRCHILD, 0x0, 0xf, true,  800000, 10000 },
+	/* Option 23 */
+	{ FAN53555_VENDOR_FAIRCHILD, 0x0, 0xc, true,  600000, 12500 },
+	/* Option 01 */
+	{ FAN53555_VENDOR_FAIRCHILD, 0x1, 0x3, true,  600000, 10000 },
+	/* Option 03 */
+	{ FAN53555_VENDOR_FAIRCHILD, 0x3, 0x3, true,  600000, 10000 },
+	/* Option 04 */
+	{ FAN53555_VENDOR_FAIRCHILD, 0x4, 0xf, true,  603000, 12826 },
+	/* Option 05 */
+	{ FAN53555_VENDOR_FAIRCHILD, 0x5, 0x3, true,  600000, 10000 },
+	/* Option 08 */
+	{ FAN53555_VENDOR_FAIRCHILD, 0x8, 0x1, true,  600000, 10000 },
+	/* Option 08 */
+	{ FAN53555_VENDOR_FAIRCHILD, 0x8, 0xf, true,  600000, 10000 },
+	/* Option 09 */
+	{ FAN53555_VENDOR_FAIRCHILD, 0xc, 0xf, true,  603000, 12826 },
+	/* SYL82X */
+	{ FAN53555_VENDOR_SILERGY,   0x8, 0x0, false, 712500, 12500 },
+	/* SYL83X */
+	{ FAN53555_VENDOR_SILERGY,   0x9, 0x0, false, 712500, 12500 },
 };
 
 /* I2C-accessible byte-sized registers */
@@ -142,7 +159,7 @@ static int fan53555_regulator_set_value(struct udevice *dev, int uV)
 	debug("%s: uV=%d; writing volume %d: %02x\n",
 	      __func__, uV, pdata->vol_reg, vol);
 
-	return pmic_clrsetbits(dev, pdata->vol_reg, GENMASK(6, 0), vol);
+	return pmic_clrsetbits(dev->parent, pdata->vol_reg, GENMASK(6, 0), vol);
 }
 
 static int fan53555_voltages_setup(struct udevice *dev)
@@ -152,10 +169,14 @@ static int fan53555_voltages_setup(struct udevice *dev)
 
 	/* Init voltage range and step */
 	for (i = 0; i < ARRAY_SIZE(ic_types); ++i) {
+		if (ic_types[i].vendor != priv->vendor)
+			continue;
+
 		if (ic_types[i].die_id != priv->die_id)
 			continue;
 
-		if (ic_types[i].die_rev != priv->die_rev)
+		if (ic_types[i].check_rev &&
+		    ic_types[i].die_rev != priv->die_rev)
 			continue;
 
 		priv->vsel_min = ic_types[i].vsel_min;
@@ -193,7 +214,7 @@ static int fan53555_probe(struct udevice *dev)
 		return ID2;
 
 	/* extract vendor, die_id and die_rev */
-	priv->vendor = bitfield_extract(ID1, 5, 3);
+	priv->vendor = dev->driver_data;
 	priv->die_id = ID1 & GENMASK(3, 0);
 	priv->die_rev = ID2 & GENMASK(3, 0);
 

+ 27 - 0
drivers/usb/dwc3/core.c

@@ -613,6 +613,31 @@ static void dwc3_core_exit_mode(struct dwc3 *dwc)
 	dwc3_gadget_run(dwc);
 }
 
+static void dwc3_uboot_hsphy_mode(struct dwc3_device *dwc3_dev,
+				  struct dwc3 *dwc)
+{
+	enum usb_phy_interface hsphy_mode = dwc3_dev->hsphy_mode;
+	u32 reg;
+
+	/* Set dwc3 usb2 phy config */
+	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
+	reg |= DWC3_GUSB2PHYCFG_PHYIF;
+	reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
+
+	switch (hsphy_mode) {
+	case USBPHY_INTERFACE_MODE_UTMI:
+		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT;
+		break;
+	case USBPHY_INTERFACE_MODE_UTMIW:
+		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
+		break;
+	default:
+		break;
+	}
+
+	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+}
+
 #define DWC3_ALIGN_MASK		(16 - 1)
 
 /**
@@ -721,6 +746,8 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 		goto err0;
 	}
 
+	dwc3_uboot_hsphy_mode(dwc3_dev, dwc);
+
 	ret = dwc3_event_buffers_setup(dwc);
 	if (ret) {
 		dev_err(dwc->dev, "failed to setup event buffers\n");

+ 12 - 0
drivers/usb/dwc3/core.h

@@ -162,6 +162,18 @@
 /* Global USB2 PHY Configuration Register */
 #define DWC3_GUSB2PHYCFG_PHYSOFTRST	(1 << 31)
 #define DWC3_GUSB2PHYCFG_SUSPHY		(1 << 6)
+#define DWC3_GUSB2PHYCFG_PHYIF		BIT(3)
+
+/* Global USB2 PHY Configuration Mask */
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK		(0xf << 10)
+
+/* Global USB2 PHY Configuration Offset */
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET	10
+
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT	(0x5 << \
+		DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT		(0x9 << \
+		DWC3_GUSB2PHYCFG_USBTRDTIM_OFFSET)
 
 /* Global USB3 PIPE Control Register */
 #define DWC3_GUSB3PIPECTL_PHYSOFTRST	(1 << 31)

+ 7 - 0
drivers/usb/gadget/Kconfig

@@ -39,6 +39,7 @@ if USB_GADGET
 config USB_GADGET_MANUFACTURER
 	string "Vendor name of the USB device"
 	default "Allwinner Technology" if ARCH_SUNXI
+	default "Rockchip" if ARCH_ROCKCHIP
 	default "U-Boot"
 	help
 	  Vendor name of the USB device emulated, reported to the host device.
@@ -47,6 +48,7 @@ config USB_GADGET_MANUFACTURER
 config USB_GADGET_VENDOR_NUM
 	hex "Vendor ID of the USB device"
 	default 0x1f3a if ARCH_SUNXI
+	default 0x2207 if ARCH_ROCKCHIP
 	default 0x0
 	help
 	  Vendor ID of the USB device emulated, reported to the host device.
@@ -56,6 +58,11 @@ config USB_GADGET_VENDOR_NUM
 config USB_GADGET_PRODUCT_NUM
 	hex "Product ID of the USB device"
 	default 0x1010 if ARCH_SUNXI
+	default 0x310a if ROCKCHIP_RK3036
+	default 0x310c if ROCKCHIP_RK3128
+	default 0x320a if ROCKCHIP_RK3229 || ROCKCHIP_RK3288
+	default 0x330a if ROCKCHIP_RK3328
+	default 0x330c if ROCKCHIP_RK3399
 	default 0x0
 	help
 	  Product ID of the USB device emulated, reported to the host device.

+ 2 - 0
include/dwc3-uboot.h

@@ -10,10 +10,12 @@
 #define __DWC3_UBOOT_H_
 
 #include <linux/usb/otg.h>
+#include <linux/usb/phy.h>
 
 struct dwc3_device {
 	unsigned long base;
 	enum usb_dr_mode dr_mode;
+	enum usb_phy_interface hsphy_mode;
 	u32 maximum_speed;
 	unsigned tx_fifo_resize:1;
 	unsigned has_lpm_erratum;

+ 19 - 0
include/linux/usb/phy.h

@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * USB PHY defines
+ *
+ * These APIs may be used between USB controllers.  USB device drivers
+ * (for either host or peripheral roles) don't use these calls; they
+ * continue to use just usb_device and usb_gadget.
+ */
+
+#ifndef __LINUX_USB_PHY_H
+#define __LINUX_USB_PHY_H
+
+enum usb_phy_interface {
+	USBPHY_INTERFACE_MODE_UNKNOWN,
+	USBPHY_INTERFACE_MODE_UTMI,
+	USBPHY_INTERFACE_MODE_UTMIW,
+};
+
+#endif /* __LINUX_USB_PHY_H */

+ 14 - 0
include/power/fan53555.h

@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019 Vasily Khoruzhick <anarsoul@gmail.com>
+ */
+
+#ifndef _FAN53555_H_
+#define _FAN53555_H_
+
+enum fan53555_vendor {
+	FAN53555_VENDOR_FAIRCHILD,
+	FAN53555_VENDOR_SILERGY,
+};
+
+#endif