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@@ -18,7 +18,7 @@
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/* mtime register */
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#define MTIME_REG(base, offset) ((ulong)(base) + (offset))
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-static u64 notrace sifive_clint_get_count(struct udevice *dev)
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+static u64 notrace riscv_aclint_timer_get_count(struct udevice *dev)
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{
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return readq((void __iomem *)MTIME_REG(dev_get_priv(dev),
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dev_get_driver_data(dev)));
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@@ -44,11 +44,11 @@ u64 notrace timer_early_get_count(void)
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}
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#endif
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-static const struct timer_ops sifive_clint_ops = {
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- .get_count = sifive_clint_get_count,
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+static const struct timer_ops riscv_aclint_timer_ops = {
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+ .get_count = riscv_aclint_timer_get_count,
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};
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-static int sifive_clint_probe(struct udevice *dev)
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+static int riscv_aclint_timer_probe(struct udevice *dev)
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{
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dev_set_priv(dev, dev_read_addr_ptr(dev));
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if (!dev_get_priv(dev))
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@@ -57,18 +57,18 @@ static int sifive_clint_probe(struct udevice *dev)
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return timer_timebase_fallback(dev);
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}
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-static const struct udevice_id sifive_clint_ids[] = {
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+static const struct udevice_id riscv_aclint_timer_ids[] = {
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{ .compatible = "riscv,clint0", .data = CLINT_MTIME_OFFSET },
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{ .compatible = "sifive,clint0", .data = CLINT_MTIME_OFFSET },
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{ .compatible = "riscv,aclint-mtimer", .data = ACLINT_MTIME_OFFSET },
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{ }
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};
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-U_BOOT_DRIVER(sifive_clint) = {
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- .name = "sifive_clint",
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+U_BOOT_DRIVER(riscv_aclint_timer) = {
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+ .name = "riscv_aclint_timer",
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.id = UCLASS_TIMER,
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- .of_match = sifive_clint_ids,
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- .probe = sifive_clint_probe,
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- .ops = &sifive_clint_ops,
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+ .of_match = riscv_aclint_timer_ids,
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+ .probe = riscv_aclint_timer_probe,
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+ .ops = &riscv_aclint_timer_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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