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@@ -74,21 +74,38 @@ static void jh7110_gmac_sel_tx_to_rgmii(int id)
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}
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}
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-static void jh7110_gmac_init(int id)
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+static void jh7110_gmac_io_pad(int id)
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{
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+ u32 cap = BIT(0); /* 2.5V */
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+
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switch (id) {
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case 0:
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- clrsetbits_le32(AON_SYSCON_BASE + AON_SYSCFG_12,
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- GMAC5_0_SEL_I_MASK,
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- BIT(GMAC5_0_SEL_I_SHIFT) & GMAC5_0_SEL_I_MASK);
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+ /* Improved GMAC0 TX I/O PAD capability */
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+ clrsetbits_le32(AON_IOMUX_BASE + 0x78, 0x3, cap & 0x3);
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+ clrsetbits_le32(AON_IOMUX_BASE + 0x7c, 0x3, cap & 0x3);
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+ clrsetbits_le32(AON_IOMUX_BASE + 0x80, 0x3, cap & 0x3);
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+ clrsetbits_le32(AON_IOMUX_BASE + 0x84, 0x3, cap & 0x3);
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+ clrsetbits_le32(AON_IOMUX_BASE + 0x88, 0x3, cap & 0x3);
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break;
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-
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case 1:
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- clrsetbits_le32(SYS_SYSCON_BASE + SYS_SYSCON_144,
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- GMAC5_1_SEL_I_MASK,
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- BIT(GMAC5_1_SEL_I_SHIFT) & GMAC5_1_SEL_I_MASK);
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+ /* Improved GMAC1 TX I/O PAD capability */
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+ clrsetbits_le32(SYS_IOMUX_BASE + 0x26c, 0x3, cap & 0x3);
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+ clrsetbits_le32(SYS_IOMUX_BASE + 0x270, 0x3, cap & 0x3);
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+ clrsetbits_le32(SYS_IOMUX_BASE + 0x274, 0x3, cap & 0x3);
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+ clrsetbits_le32(SYS_IOMUX_BASE + 0x278, 0x3, cap & 0x3);
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+ clrsetbits_le32(SYS_IOMUX_BASE + 0x27c, 0x3, cap & 0x3);
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break;
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+ }
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+}
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+static void jh7110_gmac_init(int id, u32 chip)
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+{
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+ switch (chip) {
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+ case CHIP_B:
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+ jh7110_gmac_sel_tx_to_rgmii(id);
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+ jh7110_gmac_io_pad(id);
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+ break;
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+ case CHIP_A:
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default:
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break;
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}
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@@ -172,8 +189,6 @@ static u32 get_chip_type(void)
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switch (value) {
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case CHIP_B:
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env_set("chip_vision", "B");
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- jh7110_gmac_sel_tx_to_rgmii(0);
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- jh7110_gmac_sel_tx_to_rgmii(1);
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break;
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case CHIP_A:
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default:
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@@ -220,12 +235,8 @@ int board_init(void)
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/*enable hart1-hart4 prefetcher*/
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enable_prefetcher();
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- jh7110_gmac_init(0);
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- jh7110_gmac_init(1);
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jh7110_timer_init();
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-
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jh7110_usb_init(true);
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-
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jh7110_mmc_init(0);
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jh7110_mmc_init(1);
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@@ -238,6 +249,7 @@ int misc_init_r(void)
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{
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char mac0[6] = {0x66, 0x34, 0xb0, 0x6c, 0xde, 0xad};
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char mac1[6] = {0x66, 0x34, 0xb0, 0x7c, 0xae, 0x5d};
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+ u32 chip;
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#if CONFIG_IS_ENABLED(STARFIVE_OTP)
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struct udevice *dev;
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@@ -264,7 +276,10 @@ err:
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#endif
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eth_env_set_enetaddr("eth0addr", mac0);
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eth_env_set_enetaddr("eth1addr", mac1);
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- get_chip_type();
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+
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+ chip = get_chip_type();
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+ jh7110_gmac_init(0, chip);
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+ jh7110_gmac_init(1, chip);
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return 0;
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}
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#endif
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