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@@ -27,6 +27,8 @@
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#define PCB_REVISION_B 0x0B
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#define CHIP_REVISION_SHIFT 80
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+#define CPU_VOL_BINNING_OFFSET 0x7fc
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+
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enum {
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BOOT_FLASH = 0,
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BOOT_SD,
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@@ -46,6 +48,13 @@ enum board_type_t {
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BOARD_TYPE_MAX,
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};
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+
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+enum cpu_voltage_type_t {
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+ CPU_VOL_1040 = 0xff,
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+ CPU_VOL_1060 = 0xf0,
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+ CPU_VOL_1080 = 0xf1,
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+};
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+
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static void sys_reset_clear(ulong assert, ulong status, u32 rst)
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{
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u32 value;
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@@ -287,6 +296,32 @@ static void jh7110_usb_init(bool usb2_enable)
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SYS_IOMUX_DOUT(25, 7);
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}
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+#if CONFIG_IS_ENABLED(STARFIVE_OTP)
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+static void get_cpu_voltage_type(struct udevice *dev)
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+{
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+ int ret;
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+ u32 buf = CPU_VOL_1040;
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+
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+ ret = misc_read(dev, CPU_VOL_BINNING_OFFSET, &buf, sizeof(buf));
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+ if (ret != sizeof(buf))
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+ printf("%s: error reading CPU vol from OTP\n", __func__);
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+ else {
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+ switch ((buf & 0xff)) {
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+ case CPU_VOL_1080:
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+ env_set("cpu_max_vol", "1080000");
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+ break;
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+ case CPU_VOL_1060:
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+ env_set("cpu_max_vol", "1060000");
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+ break;
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+ case CPU_VOL_1040:
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+ default:
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+ env_set("cpu_max_vol", "1040000");
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+ break;
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+ }
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+ }
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+}
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+#endif
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+
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/*enable U74-mc hart1~hart4 prefetcher*/
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static void enable_prefetcher(void)
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{
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@@ -452,6 +487,9 @@ err:
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get_chip_type();
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set_uboot_fdt_addr_env();
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+#if CONFIG_IS_ENABLED(STARFIVE_OTP)
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+ get_cpu_voltage_type(dev);
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+#endif
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return 0;
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}
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#endif
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