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@@ -59,8 +59,6 @@ static int dwmac_setup_axg(struct udevice *dev, struct eth_pdata *edata)
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switch (edata->phy_interface) {
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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- case PHY_INTERFACE_MODE_RGMII_RXID:
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- case PHY_INTERFACE_MODE_RGMII_TXID:
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/* Set RGMII mode */
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setbits_le32(plat->regs + ETH_REG_0, AXG_ETH_REG_0_PHY_INTF_RGMII |
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AXG_ETH_REG_0_TX_PHASE(1) |
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@@ -69,6 +67,15 @@ static int dwmac_setup_axg(struct udevice *dev, struct eth_pdata *edata)
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AXG_ETH_REG_0_CLK_EN);
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break;
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+ case PHY_INTERFACE_MODE_RGMII_RXID:
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+ case PHY_INTERFACE_MODE_RGMII_TXID:
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+ /* TOFIX: handle amlogic,tx-delay-ns & rx-internal-delay-ps from DT */
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+ setbits_le32(plat->regs + ETH_REG_0, AXG_ETH_REG_0_PHY_INTF_RGMII |
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+ AXG_ETH_REG_0_TX_RATIO(4) |
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+ AXG_ETH_REG_0_PHY_CLK_EN |
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+ AXG_ETH_REG_0_CLK_EN);
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+ break;
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+
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case PHY_INTERFACE_MODE_RMII:
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/* Set RMII mode */
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out_le32(plat->regs + ETH_REG_0, AXG_ETH_REG_0_PHY_INTF_RMII |
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@@ -90,8 +97,6 @@ static int dwmac_setup_gx(struct udevice *dev, struct eth_pdata *edata)
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switch (edata->phy_interface) {
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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- case PHY_INTERFACE_MODE_RGMII_RXID:
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- case PHY_INTERFACE_MODE_RGMII_TXID:
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/* Set RGMII mode */
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setbits_le32(plat->regs + ETH_REG_0, GX_ETH_REG_0_PHY_INTF |
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GX_ETH_REG_0_TX_PHASE(1) |
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@@ -101,6 +106,16 @@ static int dwmac_setup_gx(struct udevice *dev, struct eth_pdata *edata)
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break;
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+ case PHY_INTERFACE_MODE_RGMII_RXID:
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+ case PHY_INTERFACE_MODE_RGMII_TXID:
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+ /* TOFIX: handle amlogic,tx-delay-ns & rx-internal-delay-ps from DT */
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+ setbits_le32(plat->regs + ETH_REG_0, GX_ETH_REG_0_PHY_INTF |
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+ GX_ETH_REG_0_TX_RATIO(4) |
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+ GX_ETH_REG_0_PHY_CLK_EN |
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+ GX_ETH_REG_0_CLK_EN);
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+
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+ break;
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+
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case PHY_INTERFACE_MODE_RMII:
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/* Set RMII mode */
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out_le32(plat->regs + ETH_REG_0, GX_ETH_REG_0_INVERT_RMII_CLK |
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