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@@ -172,12 +172,37 @@ void clock_ll_set_source_divisor(enum periph_id periph_id, unsigned source,
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writel(value, reg);
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}
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-void clock_ll_set_source(enum periph_id periph_id, unsigned source)
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+int clock_ll_set_source_bits(enum periph_id periph_id, int mux_bits,
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+ unsigned source)
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{
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u32 *reg = get_periph_source_reg(periph_id);
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- clrsetbits_le32(reg, OUT_CLK_SOURCE_31_30_MASK,
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- source << OUT_CLK_SOURCE_31_30_SHIFT);
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+ switch (mux_bits) {
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+ case MASK_BITS_31_30:
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+ clrsetbits_le32(reg, OUT_CLK_SOURCE_31_30_MASK,
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+ source << OUT_CLK_SOURCE_31_30_SHIFT);
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+ break;
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+
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+ case MASK_BITS_31_29:
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+ clrsetbits_le32(reg, OUT_CLK_SOURCE_31_29_MASK,
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+ source << OUT_CLK_SOURCE_31_29_SHIFT);
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+ break;
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+
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+ case MASK_BITS_31_28:
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+ clrsetbits_le32(reg, OUT_CLK_SOURCE_31_28_MASK,
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+ source << OUT_CLK_SOURCE_31_28_SHIFT);
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+ break;
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+
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+ default:
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+ return -1;
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+ }
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+
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+ return 0;
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+}
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+
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+void clock_ll_set_source(enum periph_id periph_id, unsigned source)
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+{
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+ clock_ll_set_source_bits(periph_id, MASK_BITS_31_30, source);
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}
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/**
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@@ -326,25 +351,7 @@ static int adjust_periph_pll(enum periph_id periph_id, int source,
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if (source < 0)
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return -1;
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- switch (mux_bits) {
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- case MASK_BITS_31_30:
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- clrsetbits_le32(reg, OUT_CLK_SOURCE_31_30_MASK,
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- source << OUT_CLK_SOURCE_31_30_SHIFT);
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- break;
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-
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- case MASK_BITS_31_29:
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- clrsetbits_le32(reg, OUT_CLK_SOURCE_31_29_MASK,
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- source << OUT_CLK_SOURCE_31_29_SHIFT);
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- break;
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-
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- case MASK_BITS_31_28:
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- clrsetbits_le32(reg, OUT_CLK_SOURCE_31_28_MASK,
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- source << OUT_CLK_SOURCE_31_28_SHIFT);
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- break;
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-
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- default:
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- return -1;
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- }
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+ clock_ll_set_source_bits(periph_id, mux_bits, source);
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udelay(2);
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return 0;
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