Increase the drive strength of rx_clk to increase the delay available window. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
@@ -314,6 +314,9 @@
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
+ rgmii_sw_dr_2 = <0x0>;
+ rgmii_sw_dr = <0x3>;
+ rgmii_sw_dr_rxc = <0x6>;
rxc_dly_en = <1>;
tx_delay_sel_fe = <5>;
tx_delay_sel = <0xa>;
@@ -328,6 +331,9 @@
phy1: ethernet-phy@1 {
tx_delay_sel = <0>;
rxc_dly_en = <0>;