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@@ -0,0 +1,101 @@
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+// SPDX-License-Identifier: GPL-2.0 OR MIT
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+/*
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+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
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+ */
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+
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+/dts-v1/;
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+#if defined(CONFIG_TARGET_STARFIVE_VISIONFIVE2)
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+#include "starfive_visionfive2.dts"
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+#endif
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+#if defined(CONFIG_TARGET_STARFIVE_DEVKITS)
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+#include "starfive_devkits.dts"
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+#endif
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+
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+/ {
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+ chosen {
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+ opensbi-domains {
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+ compatible = "opensbi,domain,config";
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+
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+ rpmsg_shmem: rpmsg_shmem {
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+ compatible = "opensbi,domain,memregion";
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+ base = <0x0 0x6e400000>;
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+ order = <22>;
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+ };
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+
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+ rtcode: rtcode {
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+ compatible = "opensbi,domain,memregion";
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+ base = <0x0 0x6e800000>;
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+ order = <23>;
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+ };
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+
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+ rtheap: rtheap {
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+ compatible = "opensbi,domain,memregion";
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+ base = <0x0 0x6f000000>;
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+ order = <24>;
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+ };
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+
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+ dram0: dram0 {
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+ compatible = "opensbi,domain,memregion";
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+ base = <0x0 0x40000000>;
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+ order = <30>;
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+ };
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+
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+ dram1: dram1 {
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+ compatible = "opensbi,domain,memregion";
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+ base = <0x0 0x80000000>;
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+ order = <31>;
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+ };
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+
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+ allmem: allmem {
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+ compatible = "opensbi,domain,memregion";
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+ base = <0x0 0x0>;
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+ order = <64>;
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+ };
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+
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+ udomain: u-domain {
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+ compatible = "opensbi,domain,instance";
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+ possible-harts = <&cpu0 &cpu1 &cpu2 &cpu3>;
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+ regions = <&rtcode 0x0>, <&rtheap 0x0>, <&allmem 0x3f>;
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+ next-addr = <0x0 0x40200000>;
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+ boot-hart = <&cpu1>;
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+ system-reset-allowed;
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+ system-suspend-allowed;
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+ };
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+
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+ rtdomain: rt-domain {
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+ compatible = "opensbi,domain,instance";
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+ possible-harts = <&cpu4>;
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+ regions = <&rpmsg_shmem 0x3f>, <&rtcode 0x3f>, <&rtheap 0x3f>,
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+ <&dram1 0x0>, <&allmem 0x3f>;
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+ boot-hart = <&cpu4>;
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+ next-arg1 = <0x0 0x0>;
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+ next-addr = <0x0 0x6e800000>;
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+ next-mode = <0x1>;
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+ };
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+ };
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+ };
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+};
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+
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+&cpu0 {
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+ opensbi-domain = <&udomain>;
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+};
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+
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+&cpu1 {
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+ opensbi-domain = <&udomain>;
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+};
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+
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+&cpu2 {
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+ opensbi-domain = <&udomain>;
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+};
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+
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+&cpu3 {
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+ opensbi-domain = <&udomain>;
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+};
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+
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+&cpu4 {
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+ opensbi-domain = <&rtdomain>;
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+};
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+
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+&gmac1 {
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+ status = "disabled";
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+};
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