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@@ -84,6 +84,8 @@ struct pcnet_priv {
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struct pcnet_uncached_priv *uc;
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pci_dev_t dev;
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void __iomem *iobase;
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+ char *name;
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+ u8 *enetaddr;
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int cur_rx;
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int cur_tx;
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};
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@@ -153,7 +155,7 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr)
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/* Check if register access is working */
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if (pcnet_read_csr(lp, 0) != 4 || !pcnet_check(lp)) {
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- printf("%s: CSR register access check failed\n", dev->name);
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+ printf("%s: CSR register access check failed\n", lp->name);
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return -1;
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}
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@@ -174,7 +176,7 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr)
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break;
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default:
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printf("%s: PCnet version %#x not supported\n",
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- dev->name, chip_version);
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+ lp->name, chip_version);
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return -1;
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}
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@@ -190,8 +192,8 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr)
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val = pcnet_read_csr(lp, i + 12) & 0x0ffff;
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/* There may be endianness issues here. */
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- dev->enetaddr[2 * i] = val & 0x0ff;
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- dev->enetaddr[2 * i + 1] = (val >> 8) & 0x0ff;
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+ lp->enetaddr[2 * i] = val & 0x0ff;
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+ lp->enetaddr[2 * i + 1] = (val >> 8) & 0x0ff;
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}
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return 0;
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@@ -204,7 +206,7 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
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int i, val;
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unsigned long addr;
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- PCNET_DEBUG1("%s: pcnet_init...\n", dev->name);
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+ PCNET_DEBUG1("%s: %s...\n", lp->name, __func__);
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/* Switch pcnet to 32bit mode */
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pcnet_write_bcr(lp, 20, 2);
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@@ -271,7 +273,7 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
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PCNET_DEBUG1("Init block at 0x%p: MAC", &lp->uc->init_block);
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for (i = 0; i < 6; i++) {
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- lp->uc->init_block.phys_addr[i] = dev->enetaddr[i];
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+ lp->uc->init_block.phys_addr[i] = lp->enetaddr[i];
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PCNET_DEBUG1(" %02x", lp->uc->init_block.phys_addr[i]);
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}
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@@ -304,7 +306,7 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
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udelay(10);
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}
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if (i <= 0) {
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- printf("%s: TIMEOUT: controller init failed\n", dev->name);
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+ printf("%s: TIMEOUT: controller init failed\n", lp->name);
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pcnet_reset(lp);
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return -1;
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}
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@@ -340,7 +342,7 @@ static int pcnet_send(struct eth_device *dev, void *packet, int pkt_len)
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}
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if (i <= 0) {
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printf("%s: TIMEOUT: Tx%d failed (status = 0x%x)\n",
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- dev->name, lp->cur_tx, status);
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+ lp->name, lp->cur_tx, status);
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pkt_len = 0;
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goto failure;
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}
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@@ -385,7 +387,7 @@ static int pcnet_recv (struct eth_device *dev)
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err_status = status >> 8;
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if (err_status != 0x03) { /* There was an error. */
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- printf("%s: Rx%d", dev->name, lp->cur_rx);
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+ printf("%s: Rx%d", lp->name, lp->cur_rx);
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PCNET_DEBUG1(" (status=0x%x)", err_status);
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if (err_status & 0x20)
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printf(" Frame");
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@@ -402,7 +404,7 @@ static int pcnet_recv (struct eth_device *dev)
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pkt_len = (readl(&entry->msg_length) & 0xfff) - 4;
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if (pkt_len < 60) {
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printf("%s: Rx%d: invalid packet length %d\n",
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- dev->name, lp->cur_rx, pkt_len);
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+ lp->name, lp->cur_rx, pkt_len);
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} else {
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buf = lp->rx_buf[lp->cur_rx];
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invalidate_dcache_range((unsigned long)buf,
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@@ -427,7 +429,7 @@ static void pcnet_halt(struct eth_device *dev)
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struct pcnet_priv *lp = dev->priv;
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int i;
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- PCNET_DEBUG1("%s: pcnet_halt...\n", dev->name);
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+ PCNET_DEBUG1("%s: %s...\n", lp->name, __func__);
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/* Reset the PCnet controller */
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pcnet_reset(lp);
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@@ -439,7 +441,7 @@ static void pcnet_halt(struct eth_device *dev)
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udelay(10);
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}
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if (i <= 0)
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- printf("%s: TIMEOUT: controller reset failed\n", dev->name);
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+ printf("%s: TIMEOUT: controller reset failed\n", lp->name);
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}
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int pcnet_initialize(bd_t *bis)
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@@ -451,7 +453,7 @@ int pcnet_initialize(bd_t *bis)
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int dev_nr = 0;
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u32 bar;
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- PCNET_DEBUG1("\npcnet_initialize...\n");
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+ PCNET_DEBUG1("\n%s...\n", __func__);
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for (dev_nr = 0; ; dev_nr++) {
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/*
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@@ -483,6 +485,8 @@ int pcnet_initialize(bd_t *bis)
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(unsigned long)lp + sizeof(*lp));
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dev->priv = lp;
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sprintf(dev->name, "pcnet#%d", dev_nr);
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+ lp->name = dev->name;
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+ lp->enetaddr = dev->enetaddr;
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/*
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* Setup the PCI device.
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@@ -491,14 +495,14 @@ int pcnet_initialize(bd_t *bis)
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lp->iobase = (void *)(pci_mem_to_phys(devbusfn, bar) & ~0xf);
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PCNET_DEBUG1("%s: devbusfn=0x%x iobase=0x%p: ",
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- dev->name, devbusfn, lp->iobase);
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+ lp->name, devbusfn, lp->iobase);
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command = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
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pci_write_config_word(devbusfn, PCI_COMMAND, command);
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pci_read_config_word(devbusfn, PCI_COMMAND, &status);
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if ((status & command) != command) {
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printf("%s: Couldn't enable IO access or Bus Mastering\n",
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- dev->name);
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+ lp->name);
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free(dev);
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continue;
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}
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