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@@ -1,6 +1,6 @@
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/*
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+ * (C) Copyright 2007-2010 DENX Software Engineering
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* Copyright (C) 2004-2006 Freescale Semiconductor, Inc.
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- * (C) Copyright 2007 DENX Software Engineering
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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@@ -32,6 +32,7 @@
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#include <net.h>
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#include <netdev.h>
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#include <asm/processor.h>
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+#include <asm/io.h>
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#if defined(CONFIG_OF_LIBFDT)
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#include <fdt_support.h>
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@@ -44,7 +45,7 @@ int checkcpu (void)
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volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
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ulong clock = gd->cpu_clk;
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u32 pvr = get_pvr ();
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- u32 spridr = immr->sysconf.spridr;
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+ u32 spridr = in_be32(&immr->sysconf.spridr);
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char buf1[32], buf2[32];
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puts ("CPU: ");
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@@ -87,17 +88,17 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
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/*
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* Enable Reset Control Reg - "RSTE" is the magic word that let us go
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*/
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- immap->reset.rpr = 0x52535445;
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+ out_be32(&immap->reset.rpr, 0x52535445);
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/* Verify Reset Control Reg is enabled */
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- while (!((immap->reset.rcer) & RCER_CRE))
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+ while (!(in_be32(&immap->reset.rcer) & RCER_CRE))
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;
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printf ("Resetting the board.\n");
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udelay(200);
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/* Perform reset */
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- immap->reset.rcr = RCR_SWHR;
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+ out_be32(&immap->reset.rcr, RCR_SWHR);
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/* Unreached... */
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return 1;
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@@ -124,8 +125,8 @@ void watchdog_reset (void)
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/* Reset watchdog */
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volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
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- immr->wdt.swsrr = 0x556c;
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- immr->wdt.swsrr = 0xaa39;
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+ out_be32(&immr->wdt.swsrr, 0x556c);
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+ out_be32(&immr->wdt.swsrr, 0xaa39);
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if (re_enable)
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enable_interrupts ();
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