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@@ -226,35 +226,6 @@ to the last 2MB of the 8MB chip, address range [600000, 7FFFFF].
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-Intel Cherry Hill specific instructions for bare mode:
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-
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-This uses Intel FSP for Braswell platform. Download it from Intel FSP website,
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-put the .fd file to the board directory and rename it to fsp.bin.
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-
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-Extract descriptor.bin and me.bin from the original BIOS on the board using
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-ifdtool and put them to the board directory as well.
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-
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-Note the FSP package for Braswell does not ship a traditional legacy VGA BIOS
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-image for the integrated graphics device. Instead a new binary called Video
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-BIOS Table (VBT) is shipped. Put it to the board directory and rename it to
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-vbt.bin if you want graphics support in U-Boot.
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-
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-Now you can build U-Boot and obtain u-boot.rom
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-
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-$ make cherryhill_defconfig
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-$ make all
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-
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-An important note for programming u-boot.rom to the on-board SPI flash is that
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-you need make sure the SPI flash's 'quad enable' bit in its status register
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-matches the settings in the descriptor.bin, otherwise the board won't boot.
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-
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-For the on-board SPI flash MX25U6435F, this can be done by writing 0x40 to the
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-status register by DediProg in: Config > Modify Status Register > Write Status
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-Register(s) > Register1 Value(Hex). This is is a one-time change. Once set, it
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-persists in SPI flash part regardless of the u-boot.rom image burned.
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-
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----
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-
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Intel Galileo instructions for bare mode:
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Only one binary blob is needed for Remote Management Unit (RMU) within Intel
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