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@@ -10,11 +10,14 @@
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#include <spl.h>
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#include <misc.h>
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#include <log.h>
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+#include <fdtdec.h>
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+#include <dm/root.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/spl.h>
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+#include <asm/arch/eeprom.h>
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#define GEM_PHY_RESET SIFIVE_GENERIC_GPIO_NR(0, 12)
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@@ -26,6 +29,16 @@ int spl_board_init_f(void)
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{
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int ret;
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+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
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+ int rescan;
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+
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+ ret = fdtdec_resetup(&rescan);
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+ if (!ret && rescan) {
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+ dm_uninit();
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+ dm_init_and_scan(true);
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+ }
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+#endif
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+
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ret = spl_soc_init();
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if (ret) {
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debug("HiFive Unmatched FU740 SPL init failed: %d\n", ret);
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@@ -79,7 +92,18 @@ u32 spl_boot_device(void)
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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- /* boot using first FIT config */
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- return 0;
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+ /*
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+ * Apply different DDR params on different board revision.
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+ * Use PCB revision which is byte 0x7 in I2C platform EEPROM
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+ * to distinguish that.
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+ */
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+ if (get_pcb_revision_from_eeprom() == PCB_REVISION_REV3 &&
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+ !strcmp(name, "hifive-unmatched-a00"))
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+ return 0;
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+ else if (get_pcb_revision_from_eeprom() != PCB_REVISION_REV3 &&
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+ !strcmp(name, "hifive-unmatched-a00-rev1"))
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+ return 0;
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+
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+ return -1;
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}
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#endif
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