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@@ -314,3 +314,18 @@ Flash layout for OSPI:
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| ospi.rootfs(UBIFS) |
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+----------------------------+
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+
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+Firmwares:
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+----------
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+
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+The J721e u-boot allows firmware to be loaded for the Cortex-R5 subsystem.
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+The CPSW5G in J7200 and CPSW9G in J721E present in MAIN domain is configured
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+and controlled by the ethernet firmware that executes in the MAIN Cortex R5.
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+The default supported environment variables support loading these firmwares
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+from only MMC. "dorprocboot" env variable has to be set for the U-BOOT to load
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+and start the remote cores in the system.
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+
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+J721E common processor board can be attached to a Ethernet QSGMII card and the
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+PHY in the card has to be reset before it can be used for data transfer.
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+"do_main_cpsw0_qsgmii_phyinit" env variable has to be set for the U-BOOT to
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+configure this PHY.
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