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@@ -99,7 +99,6 @@ struct am65_cpsw_common {
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u32 port_num;
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struct am65_cpsw_port ports[AM65_CPSW_CPSWNU_MAX_PORTS];
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- u32 rflow_id_base;
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struct mii_dev *bus;
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u32 bus_freq;
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@@ -276,6 +275,7 @@ static int am65_cpsw_start(struct udevice *dev)
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struct am65_cpsw_common *common = priv->cpsw_common;
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struct am65_cpsw_port *port = &common->ports[priv->port_id];
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struct am65_cpsw_port *port0 = &common->ports[0];
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+ struct ti_udma_drv_chan_cfg_data *dma_rx_cfg_data;
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int ret, i;
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ret = power_domain_on(&common->pwrdmn);
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@@ -341,8 +341,11 @@ static int am65_cpsw_start(struct udevice *dev)
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writel(PKTSIZE_ALIGN, port0->port_base + AM65_CPSW_PN_RX_MAXLEN_REG);
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/* set base flow_id */
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- writel(common->rflow_id_base,
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+ dma_get_cfg(&common->dma_rx, 0, (void **)&dma_rx_cfg_data);
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+ writel(dma_rx_cfg_data->flow_id_base,
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port0->port_base + AM65_CPSW_P0_FLOW_ID_REG);
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+ dev_info(dev, "K3 CPSW: rflow_id_base: %u\n",
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+ dma_rx_cfg_data->flow_id_base);
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/* Reset and enable the ALE */
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writel(AM65_CPSW_ALE_CTL_REG_ENABLE | AM65_CPSW_ALE_CTL_REG_RESET_TBL |
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@@ -669,11 +672,6 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
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AM65_CPSW_CPSW_NU_ALE_BASE;
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cpsw_common->mdio_base = cpsw_common->ss_base + AM65_CPSW_MDIO_BASE;
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- cpsw_common->rflow_id_base = 0;
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- cpsw_common->rflow_id_base =
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- dev_read_u32_default(dev, "ti,rx-flow-id-base",
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- cpsw_common->rflow_id_base);
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-
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ports_np = dev_read_subnode(dev, "ports");
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if (!ofnode_valid(ports_np)) {
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ret = -ENOENT;
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@@ -761,12 +759,11 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
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if (ret)
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goto out;
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- dev_info(dev, "K3 CPSW: nuss_ver: 0x%08X cpsw_ver: 0x%08X ale_ver: 0x%08X Ports:%u rflow_id_base:%u mdio_freq:%u\n",
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+ dev_info(dev, "K3 CPSW: nuss_ver: 0x%08X cpsw_ver: 0x%08X ale_ver: 0x%08X Ports:%u mdio_freq:%u\n",
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readl(cpsw_common->ss_base),
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readl(cpsw_common->cpsw_base),
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readl(cpsw_common->ale_base),
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cpsw_common->port_num,
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- cpsw_common->rflow_id_base,
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cpsw_common->bus_freq);
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out:
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