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@@ -0,0 +1,257 @@
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+/*
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+ * STiH407 family DWC3 specific Glue layer
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+ *
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+ * Copyright (c) 2017
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+ * Patrice Chotard <patrice.chotard@st.com>
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+ *
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+ * SPDX-License-Identifier: GPL-2.0+
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+ */
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+
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+#include <common.h>
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+#include <asm/io.h>
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+#include <dm.h>
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+#include <errno.h>
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+#include <fdtdec.h>
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+#include <libfdt.h>
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+#include <dm/lists.h>
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+#include <regmap.h>
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+#include <reset-uclass.h>
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+#include <syscon.h>
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+#include <usb.h>
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+
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+#include <linux/usb/dwc3.h>
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+#include <linux/usb/otg.h>
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+#include <dwc3-sti-glue.h>
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+
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+DECLARE_GLOBAL_DATA_PTR;
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+
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+/*
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+ * struct sti_dwc3_glue_platdata - dwc3 STi glue driver private structure
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+ * @syscfg_base: addr for the glue syscfg
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+ * @glue_base: addr for the glue registers
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+ * @syscfg_offset: usb syscfg control offset
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+ * @powerdown_ctl: rest controller for powerdown signal
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+ * @softreset_ctl: reset controller for softreset signal
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+ * @mode: drd static host/device config
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+ */
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+struct sti_dwc3_glue_platdata {
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+ phys_addr_t syscfg_base;
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+ phys_addr_t glue_base;
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+ phys_addr_t syscfg_offset;
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+ struct reset_ctl powerdown_ctl;
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+ struct reset_ctl softreset_ctl;
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+ enum usb_dr_mode mode;
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+};
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+
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+static int sti_dwc3_glue_drd_init(struct sti_dwc3_glue_platdata *plat)
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+{
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+ unsigned long val;
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+
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+ val = readl(plat->syscfg_base + plat->syscfg_offset);
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+
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+ val &= USB3_CONTROL_MASK;
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+
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+ switch (plat->mode) {
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+ case USB_DR_MODE_PERIPHERAL:
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+ val &= ~(USB3_DELAY_VBUSVALID
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+ | USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3)
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+ | USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2
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+ | USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2);
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+
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+ val |= USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID;
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+ break;
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+
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+ case USB_DR_MODE_HOST:
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+ val &= ~(USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID
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+ | USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3)
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+ | USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2
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+ | USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2);
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+
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+ val |= USB3_DELAY_VBUSVALID;
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+ break;
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+
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+ default:
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+ error("Unsupported mode of operation %d\n", plat->mode);
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+ return -EINVAL;
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+ }
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+ writel(val, plat->syscfg_base + plat->syscfg_offset);
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+
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+ return 0;
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+}
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+
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+static void sti_dwc3_glue_init(struct sti_dwc3_glue_platdata *plat)
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+{
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+ unsigned long reg;
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+
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+ reg = readl(plat->glue_base + CLKRST_CTRL);
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+
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+ reg |= AUX_CLK_EN | EXT_CFG_RESET_N | XHCI_REVISION;
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+ reg &= ~SW_PIPEW_RESET_N;
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+
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+ writel(reg, plat->glue_base + CLKRST_CTRL);
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+
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+ /* configure mux for vbus, powerpresent and bvalid signals */
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+ reg = readl(plat->glue_base + USB2_VBUS_MNGMNT_SEL1);
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+
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+ reg |= SEL_OVERRIDE_VBUSVALID(USB2_VBUS_UTMIOTG) |
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+ SEL_OVERRIDE_POWERPRESENT(USB2_VBUS_UTMIOTG) |
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+ SEL_OVERRIDE_BVALID(USB2_VBUS_UTMIOTG);
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+
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+ writel(reg, plat->glue_base + USB2_VBUS_MNGMNT_SEL1);
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+
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+ setbits_le32(plat->glue_base + CLKRST_CTRL, SW_PIPEW_RESET_N);
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+}
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+
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+static int sti_dwc3_glue_ofdata_to_platdata(struct udevice *dev)
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+{
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+ struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
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+ struct udevice *syscon;
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+ struct regmap *regmap;
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+ int ret;
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+ u32 reg[4];
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+
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+ ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
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+ "reg", reg, ARRAY_SIZE(reg));
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+ if (ret) {
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+ error("unable to find st,stih407-dwc3 reg property(%d)\n", ret);
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+ return ret;
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+ }
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+
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+ plat->glue_base = reg[0];
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+ plat->syscfg_offset = reg[2];
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+
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+ /* get corresponding syscon phandle */
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+ ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "st,syscfg",
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+ &syscon);
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+ if (ret) {
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+ error("unable to find syscon device (%d)\n", ret);
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+ return ret;
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+ }
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+
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+ /* get syscfg-reg base address */
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+ regmap = syscon_get_regmap(syscon);
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+ if (!regmap) {
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+ error("unable to find regmap\n");
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+ return -ENODEV;
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+ }
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+ plat->syscfg_base = regmap->base;
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+
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+ /* get powerdown reset */
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+ ret = reset_get_by_name(dev, "powerdown", &plat->powerdown_ctl);
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+ if (ret) {
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+ error("can't get powerdown reset for %s (%d)", dev->name, ret);
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+ return ret;
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+ }
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+
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+ /* get softreset reset */
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+ ret = reset_get_by_name(dev, "softreset", &plat->softreset_ctl);
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+ if (ret)
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+ error("can't get soft reset for %s (%d)", dev->name, ret);
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+
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+ return ret;
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+};
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+
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+static int sti_dwc3_glue_bind(struct udevice *dev)
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+{
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+ struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
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+ int dwc3_node;
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+
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+ /* check if one subnode is present */
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+ dwc3_node = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
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+ if (dwc3_node <= 0) {
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+ error("Can't find subnode for %s\n", dev->name);
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+ return -ENODEV;
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+ }
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+
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+ /* check if the subnode compatible string is the dwc3 one*/
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+ if (fdt_node_check_compatible(gd->fdt_blob, dwc3_node,
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+ "snps,dwc3") != 0) {
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+ error("Can't find dwc3 subnode for %s\n", dev->name);
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+ return -ENODEV;
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+ }
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+
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+ /* retrieve the DWC3 dual role mode */
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+ plat->mode = usb_get_dr_mode(dwc3_node);
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+ if (plat->mode == USB_DR_MODE_UNKNOWN)
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+ /* by default set dual role mode to HOST */
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+ plat->mode = USB_DR_MODE_HOST;
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+
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+ return dm_scan_fdt_dev(dev);
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+}
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+
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+static int sti_dwc3_glue_probe(struct udevice *dev)
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+{
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+ struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
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+ int ret;
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+
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+ /* deassert both powerdown and softreset */
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+ ret = reset_deassert(&plat->powerdown_ctl);
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+ if (ret < 0) {
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+ error("DWC3 powerdown reset deassert failed: %d", ret);
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+ return ret;
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+ }
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+
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+ ret = reset_deassert(&plat->softreset_ctl);
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+ if (ret < 0) {
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+ error("DWC3 soft reset deassert failed: %d", ret);
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+ goto softreset_err;
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+ }
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+
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+ ret = sti_dwc3_glue_drd_init(plat);
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+ if (ret)
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+ goto init_err;
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+
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+ sti_dwc3_glue_init(plat);
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+
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+ return 0;
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+
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+init_err:
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+ ret = reset_assert(&plat->softreset_ctl);
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+ if (ret < 0) {
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+ error("DWC3 soft reset deassert failed: %d", ret);
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+ return ret;
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+ }
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+
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+softreset_err:
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+ ret = reset_assert(&plat->powerdown_ctl);
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+ if (ret < 0)
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+ error("DWC3 powerdown reset deassert failed: %d", ret);
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+
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+ return ret;
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+}
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+
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+static int sti_dwc3_glue_remove(struct udevice *dev)
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+{
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+ struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
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+ int ret;
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+
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+ /* assert both powerdown and softreset */
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+ ret = reset_assert(&plat->powerdown_ctl);
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+ if (ret < 0) {
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+ error("DWC3 powerdown reset deassert failed: %d", ret);
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+ return ret;
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+ }
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+
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+ ret = reset_assert(&plat->softreset_ctl);
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+ if (ret < 0)
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+ error("DWC3 soft reset deassert failed: %d", ret);
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+
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+ return ret;
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+}
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+
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+static const struct udevice_id sti_dwc3_glue_ids[] = {
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+ { .compatible = "st,stih407-dwc3" },
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+ { }
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+};
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+
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+U_BOOT_DRIVER(dwc3_sti_glue) = {
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+ .name = "dwc3_sti_glue",
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+ .id = UCLASS_MISC,
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+ .of_match = sti_dwc3_glue_ids,
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+ .ofdata_to_platdata = sti_dwc3_glue_ofdata_to_platdata,
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+ .probe = sti_dwc3_glue_probe,
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+ .remove = sti_dwc3_glue_remove,
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+ .bind = sti_dwc3_glue_bind,
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+ .platdata_auto_alloc_size = sizeof(struct sti_dwc3_glue_platdata),
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+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
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+};
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