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@@ -61,6 +61,7 @@
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#define AM65_CPSW_MACSL_CTL_REG 0x0
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#define AM65_CPSW_MACSL_CTL_REG_IFCTL_A BIT(15)
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+#define AM65_CPSW_MACSL_CTL_EXT_EN BIT(18)
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#define AM65_CPSW_MACSL_CTL_REG_GIG BIT(7)
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#define AM65_CPSW_MACSL_CTL_REG_GMII_EN BIT(5)
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#define AM65_CPSW_MACSL_CTL_REG_LOOPBACK BIT(1)
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@@ -187,6 +188,9 @@ static int am65_cpsw_update_link(struct am65_cpsw_priv *priv)
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AM65_CPSW_MACSL_CTL_REG_GMII_EN;
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if (phy->speed == 1000)
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mac_control |= AM65_CPSW_MACSL_CTL_REG_GIG;
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+ if (phy->speed == 10 && phy_interface_is_rgmii(phy))
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+ /* Can be used with in band mode only */
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+ mac_control |= AM65_CPSW_MACSL_CTL_EXT_EN;
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if (phy->duplex == DUPLEX_FULL)
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mac_control |= AM65_CPSW_MACSL_CTL_REG_FULL_DUPLEX;
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if (phy->speed == 100)
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