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@@ -189,6 +189,7 @@
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#define SDHCI_SUPPORT_SDR50 0x00000001
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#define SDHCI_SUPPORT_SDR104 0x00000002
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#define SDHCI_SUPPORT_DDR50 0x00000004
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+#define SDHCI_SUPPORT_HS400 BIT(31)
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#define SDHCI_USE_SDR50_TUNING 0x00002000
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#define SDHCI_CLOCK_MUL_MASK 0x00FF0000
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@@ -248,6 +249,8 @@
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#define SDHCI_QUIRK_USE_WIDE8 (1 << 8)
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#define SDHCI_QUIRK_NO_1_8_V (1 << 9)
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#define SDHCI_QUIRK_SUPPORT_SINGLE (1 << 10)
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+/* Capability register bit-63 indicates HS400 support */
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+#define SDHCI_QUIRK_CAPS_BIT63_FOR_HS400 BIT(11)
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/* to make gcc happy */
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struct sdhci_host;
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