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@@ -954,10 +954,11 @@ static ulong stm32mp1_clk_get(struct stm32mp1_clk_priv *priv, int p)
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case RCC_MPCKSELR_PLL:
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case RCC_MPCKSELR_PLL_MPUDIV:
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clock = stm32mp1_read_pll_freq(priv, _PLL1, _DIV_P);
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- if (p == RCC_MPCKSELR_PLL_MPUDIV) {
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+ if ((reg & RCC_SELR_SRC_MASK) ==
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+ RCC_MPCKSELR_PLL_MPUDIV) {
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reg = readl(priv->base + RCC_MPCKDIVR);
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- clock /= stm32mp1_mpu_div[reg &
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- RCC_MPUDIV_MASK];
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+ clock >>= stm32mp1_mpu_div[reg &
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+ RCC_MPUDIV_MASK];
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}
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break;
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}
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