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@@ -1,64 +1,24 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
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+ * (C) Copyright 2018 Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include <common.h>
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-#include <linux/libfdt.h>
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-#include <linux/err.h>
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+#include <asm/arch/eth.h>
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#include <asm/arch/gx.h>
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-#include <asm/arch/sm.h>
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+#include <asm/arch/mem.h>
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+#include <asm/io.h>
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#include <asm/armv8/mmu.h>
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-#include <asm/unaligned.h>
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#include <linux/sizes.h>
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-#include <efi_loader.h>
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-#include <asm/io.h>
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+#include <phy.h>
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DECLARE_GLOBAL_DATA_PTR;
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-int dram_init(void)
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-{
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- const fdt64_t *val;
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- int offset;
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- int len;
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-
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- offset = fdt_path_offset(gd->fdt_blob, "/memory");
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- if (offset < 0)
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- return -EINVAL;
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-
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- val = fdt_getprop(gd->fdt_blob, offset, "reg", &len);
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- if (len < sizeof(*val) * 2)
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- return -EINVAL;
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-
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- /* Use unaligned access since cache is still disabled */
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- gd->ram_size = get_unaligned_be64(&val[1]);
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-
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- return 0;
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-}
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-
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-phys_size_t get_effective_memsize(void)
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-{
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- /* Size is reported in MiB, convert it in bytes */
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- return ((readl(GX_AO_SEC_GP_CFG0) & GX_AO_MEM_SIZE_MASK)
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- >> GX_AO_MEM_SIZE_SHIFT) * SZ_1M;
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-}
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-
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-static void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size)
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-{
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- int ret;
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-
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- ret = fdt_add_mem_rsv(fdt, start, size);
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- if (ret)
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- printf("Could not reserve zone @ 0x%llx\n", start);
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-
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- if (IS_ENABLED(CONFIG_EFI_LOADER)) {
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- efi_add_memory_map(start,
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- ALIGN(size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
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- EFI_RESERVED_MEMORY_TYPE, false);
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- }
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-}
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-
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-void meson_gx_init_reserved_memory(void *fdt)
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+/* Configure the reserved memory zones exported by the secure registers
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+ * into EFI and DTB reserved memory entries.
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+ */
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+void meson_init_reserved_memory(void *fdt)
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{
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u64 bl31_size, bl31_start;
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u64 bl32_size, bl32_start;
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@@ -70,7 +30,6 @@ void meson_gx_init_reserved_memory(void *fdt)
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* - AO_SEC_GP_CFG5: bl31 physical start address, can be NULL
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* - AO_SEC_GP_CFG4: bl32 physical start address, can be NULL
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*/
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-
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reg = readl(GX_AO_SEC_GP_CFG3);
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bl31_size = ((reg & GX_AO_BL31_RSVMEM_SIZE_MASK)
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@@ -102,9 +61,11 @@ void meson_gx_init_reserved_memory(void *fdt)
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meson_board_add_reserved_memory(fdt, bl32_start, bl32_size);
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}
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-void reset_cpu(ulong addr)
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+phys_size_t get_effective_memsize(void)
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{
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- psci_system_reset();
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+ /* Size is reported in MiB, convert it in bytes */
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+ return ((readl(GX_AO_SEC_GP_CFG0) & GX_AO_MEM_SIZE_MASK)
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+ >> GX_AO_MEM_SIZE_SHIFT) * SZ_1M;
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}
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static struct mm_region gx_mem_map[] = {
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@@ -128,3 +89,44 @@ static struct mm_region gx_mem_map[] = {
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};
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struct mm_region *mem_map = gx_mem_map;
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+
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+/* Configure the Ethernet MAC with the requested interface mode
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+ * with some optional flags.
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+ */
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+void meson_eth_init(phy_interface_t mode, unsigned int flags)
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+{
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+ switch (mode) {
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+ case PHY_INTERFACE_MODE_RGMII:
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+ case PHY_INTERFACE_MODE_RGMII_ID:
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+ case PHY_INTERFACE_MODE_RGMII_RXID:
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+ case PHY_INTERFACE_MODE_RGMII_TXID:
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+ /* Set RGMII mode */
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+ setbits_le32(GX_ETH_REG_0, GX_ETH_REG_0_PHY_INTF |
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+ GX_ETH_REG_0_TX_PHASE(1) |
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+ GX_ETH_REG_0_TX_RATIO(4) |
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+ GX_ETH_REG_0_PHY_CLK_EN |
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+ GX_ETH_REG_0_CLK_EN);
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+ break;
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+
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+ case PHY_INTERFACE_MODE_RMII:
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+ /* Set RMII mode */
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+ out_le32(GX_ETH_REG_0, GX_ETH_REG_0_INVERT_RMII_CLK |
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+ GX_ETH_REG_0_CLK_EN);
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+
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+ /* Use GXL RMII Internal PHY */
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+ if (IS_ENABLED(CONFIG_MESON_GXL) &&
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+ (flags & MESON_USE_INTERNAL_RMII_PHY)) {
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+ writel(0x10110181, GX_ETH_REG_2);
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+ writel(0xe40908ff, GX_ETH_REG_3);
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+ }
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+
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+ break;
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+
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+ default:
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+ printf("Invalid Ethernet interface mode\n");
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+ return;
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+ }
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+
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+ /* Enable power gate */
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+ clrbits_le32(GX_MEM_PD_REG_0, GX_MEM_PD_REG_0_ETH_MASK);
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+}
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