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@@ -19,14 +19,6 @@
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/clock.h>
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-/*
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- * Define Master code if there are multiple masters on the I2C_SR bus.
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- * Normally not required
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- */
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-#ifndef CONFIG_OMAP_VC_I2C_HS_MCODE
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-#define CONFIG_OMAP_VC_I2C_HS_MCODE 0x0
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-#endif
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-
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/* Register defines and masks for VC IP Block */
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/* PRM_VC_CFG_I2C_MODE */
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#define PRM_VC_CFG_I2C_MODE_DFILTEREN_BIT (0x1 << 6)
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@@ -84,8 +76,10 @@ static void omap_vc_init(u16 speed_khz)
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(cycles_low << PRM_VC_CFG_I2C_CLK_SCLL_SHIFT);
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writel(val, (*prcm)->prm_vc_cfg_i2c_clk);
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- val = CONFIG_OMAP_VC_I2C_HS_MCODE <<
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- PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT;
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+ /*
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+ * Master code if there are multiple masters on the I2C_SR bus.
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+ */
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+ val = 0x0 << PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT;
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/* No HS mode for now */
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val &= ~PRM_VC_CFG_I2C_MODE_HSMODEEN_BIT;
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writel(val, (*prcm)->prm_vc_cfg_i2c_mode);
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