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@@ -105,6 +105,7 @@
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#define LTSSM_SHIFT 24
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#define LTSSM_MASK 0x3f
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#define LTSSM_L0 0x10
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+#define VENDOR_ID_REG (LMI_BASE_ADDR + 0x44)
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/* PCIe core controller registers */
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#define CTRL_CORE_BASE_ADDR 0x18000
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@@ -529,6 +530,15 @@ static int pcie_advk_setup_hw(struct pcie_advk *pcie)
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reg |= (IS_RC_MSK << IS_RC_SHIFT);
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advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
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+ /*
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+ * Replace incorrect PCI vendor id value 0x1b4b by correct value 0x11ab.
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+ * VENDOR_ID_REG contains vendor id in low 16 bits and subsystem vendor
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+ * id in high 16 bits. Updating this register changes readback value of
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+ * read-only vendor id bits in PCIE_CORE_DEV_ID_REG register. Workaround
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+ * for erratum 4.1: "The value of device and vendor ID is incorrect".
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+ */
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+ advk_writel(pcie, 0x11ab11ab, VENDOR_ID_REG);
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+
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/* Set Advanced Error Capabilities and Control PF0 register */
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reg = PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX |
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PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX_EN |
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