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@@ -227,4 +227,23 @@
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#clock-cells = <1>;
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};
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+ pwm: pwm@11006000 {
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+ compatible = "mediatek,mt7622-pwm";
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+ reg = <0x11006000 0x1000>;
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+ #clock-cells = <1>;
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+ #pwm-cells = <2>;
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+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>;
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+ clocks = <&topckgen CLK_TOP_PWM_SEL>,
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+ <&pericfg CLK_PERI_PWM_PD>,
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+ <&pericfg CLK_PERI_PWM1_PD>,
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+ <&pericfg CLK_PERI_PWM2_PD>,
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+ <&pericfg CLK_PERI_PWM3_PD>,
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+ <&pericfg CLK_PERI_PWM4_PD>,
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+ <&pericfg CLK_PERI_PWM5_PD>,
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+ <&pericfg CLK_PERI_PWM6_PD>;
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+ clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4",
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+ "pwm5", "pwm6";
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+ status = "disabled";
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+ };
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+
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};
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