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@@ -22,10 +22,12 @@ DECLARE_GLOBAL_DATA_PTR;
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void get_sys_info(struct sys_info *sys_info)
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{
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struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
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-#if (defined(CONFIG_FSL_ESDHC) &&\
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- defined(CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK)) ||\
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- defined(CONFIG_SYS_DPAA_FMAN)
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-
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+/* rcw_tmp is needed to get FMAN clock, or to get cluster group A
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+ * mux 2 clock for LS1043A/LS1046A.
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+ */
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+#if defined(CONFIG_SYS_DPAA_FMAN) || \
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+ defined(CONFIG_TARGET_LS1046ARDB) || \
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+ defined(CONFIG_TARGET_LS1043ARDB)
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u32 rcw_tmp;
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#endif
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struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_CLK_ADDR);
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@@ -122,32 +124,32 @@ void get_sys_info(struct sys_info *sys_info)
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}
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#endif
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+#ifdef CONFIG_FSL_ESDHC
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#define HWA_CGA_M2_CLK_SEL 0x00000007
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#define HWA_CGA_M2_CLK_SHIFT 0
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-#ifdef CONFIG_FSL_ESDHC
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-#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
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+#if defined(CONFIG_TARGET_LS1046ARDB) || defined(CONFIG_TARGET_LS1043ARDB)
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rcw_tmp = in_be32(&gur->rcwsr[15]);
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switch ((rcw_tmp & HWA_CGA_M2_CLK_SEL) >> HWA_CGA_M2_CLK_SHIFT) {
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case 1:
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- sys_info->freq_sdhc = freq_c_pll[1];
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+ sys_info->freq_cga_m2 = freq_c_pll[1];
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break;
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+#if defined(CONFIG_TARGET_LS1046ARDB)
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case 2:
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- sys_info->freq_sdhc = freq_c_pll[1] / 2;
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+ sys_info->freq_cga_m2 = freq_c_pll[1] / 2;
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break;
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+#endif
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case 3:
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- sys_info->freq_sdhc = freq_c_pll[1] / 3;
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+ sys_info->freq_cga_m2 = freq_c_pll[1] / 3;
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break;
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+#if defined(CONFIG_TARGET_LS1046ARDB)
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case 6:
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- sys_info->freq_sdhc = freq_c_pll[0] / 2;
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+ sys_info->freq_cga_m2 = freq_c_pll[0] / 2;
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break;
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+#endif
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default:
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- printf("Error: Unknown ESDHC clock select!\n");
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+ printf("Error: Unknown peripheral clock select!\n");
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break;
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}
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-#else
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- sys_info->freq_sdhc = (sys_info->freq_systembus /
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- CONFIG_SYS_FSL_PCLK_DIV) /
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- CONFIG_SYS_FSL_SDHC_CLK_DIV;
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#endif
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#endif
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@@ -183,9 +185,22 @@ int get_clocks(void)
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gd->mem_clk = sys_info.freq_ddrbus;
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#ifdef CONFIG_FSL_ESDHC
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- gd->arch.sdhc_clk = sys_info.freq_sdhc;
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+#if defined(CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK)
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+#if defined(CONFIG_TARGET_LS1046ARDB)
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+ gd->arch.sdhc_clk = sys_info.freq_cga_m2 / 2;
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+#endif
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+#if defined(CONFIG_TARGET_LS1043ARDB)
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+ gd->arch.sdhc_clk = sys_info.freq_cga_m2;
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+#endif
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+#if defined(CONFIG_TARGET_LS1012ARDB)
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+ gd->arch.sdhc_clk = sys_info.freq_systembus;
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+#endif
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+#else
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+ gd->arch.sdhc_clk = (sys_info.freq_systembus /
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+ CONFIG_SYS_FSL_PCLK_DIV) /
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+ CONFIG_SYS_FSL_SDHC_CLK_DIV;
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+#endif
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#endif
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-
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if (gd->cpu_clk != 0)
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return 0;
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else
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