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@@ -54,7 +54,8 @@ endif # ENV_IS_IN_SPI_FLASH
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config SIFIVE_FU540_L2CC_FLUSH
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bool "Support Level 2 Cache Controller Flush operation of SiFive fu540"
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-if SIFIVE_FU540_L2CC_FLUSH
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+menu "Level 2 Cache Controller Flush range"
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+ depends on SIFIVE_FU540_L2CC_FLUSH
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config SIFIVE_FU540_L2CC_FLUSH_START
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hex "Level 2 Cache Flush operation start"
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@@ -64,4 +65,19 @@ config SIFIVE_FU540_L2CC_FLUSH_SIZE
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hex "Level 2 Cache Flush operation size"
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default 0x800000000
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-endif # SIFIVE_FU540_L2CC_FLUSH
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+endmenu # SIFIVE_FU540_L2CC_FLUSH
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+
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+config SIFIVE_FU540_L2CC_WAYENABLE_DIY
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+ bool "Config Level 2 Cache Controller: the largest way which has been enabled"
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+
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+menu "The index of the largest way"
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+ depends on SIFIVE_FU540_L2CC_WAYENABLE_DIY
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+
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+config SIFIVE_FU540_L2CC_WAYENABLE_DIY_NUM
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+ int "The index of the largest way which has been enabled for level 2 Cache "
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+ default 1
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+ range 0 255
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+ help
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+ Range[0, 255]. The index of the largest way which has been enabled.
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+
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+endmenu # SIFIVE_FU540_L2CC_WAYENABLE_DIY
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