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configs: ls1028a: use default SDHC clock divider value

The SDHC clock divider value for LS1028A should be default 2,
not 1.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu 4 years ago
parent
commit
181c65b814

+ 0 - 1
configs/ls1028aqds_tfa_SECURE_BOOT_defconfig

@@ -4,7 +4,6 @@ CONFIG_TFABOOT=y
 CONFIG_SYS_MALLOC_F_LEN=0x6000
 CONFIG_NXP_ESBC=y
 CONFIG_FSPI_AHB_EN_4BYTE=y
-CONFIG_SYS_FSL_SDHC_CLK_DIV=1
 CONFIG_ENV_SIZE=0x2000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y

+ 0 - 1
configs/ls1028aqds_tfa_defconfig

@@ -3,7 +3,6 @@ CONFIG_TARGET_LS1028AQDS=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_MALLOC_F_LEN=0x6000
 CONFIG_FSPI_AHB_EN_4BYTE=y
-CONFIG_SYS_FSL_SDHC_CLK_DIV=1
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x500000
 CONFIG_NR_DRAM_BANKS=2

+ 0 - 1
configs/ls1028ardb_tfa_SECURE_BOOT_defconfig

@@ -4,7 +4,6 @@ CONFIG_TFABOOT=y
 CONFIG_SYS_MALLOC_F_LEN=0x6000
 CONFIG_NXP_ESBC=y
 CONFIG_FSPI_AHB_EN_4BYTE=y
-CONFIG_SYS_FSL_SDHC_CLK_DIV=1
 CONFIG_ENV_SIZE=0x2000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y

+ 0 - 1
configs/ls1028ardb_tfa_defconfig

@@ -3,7 +3,6 @@ CONFIG_TARGET_LS1028ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_MALLOC_F_LEN=0x6000
 CONFIG_FSPI_AHB_EN_4BYTE=y
-CONFIG_SYS_FSL_SDHC_CLK_DIV=1
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x500000
 CONFIG_NR_DRAM_BANKS=2