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Timer: Remove reset_timer_masked()

In some circumstances, reset_timer_masked() was called be timer_init() in
order to perform architecture specific timer initialisation. In such
cases, the required code in reset_timer_masked() has been moved into
timer_init()
Graeme Russ 13 years ago
parent
commit
17659d7de9

+ 0 - 7
arch/arm/cpu/arm1136/mx31/timer.c

@@ -106,13 +106,6 @@ int timer_init (void)
 	return 0;
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	gd->lastinc = GPTCNT; /* capture current incrementer value time */
-	gd->tbl = 0; /* start "advancing" time stamp from 0 */
-}
-
 unsigned long long get_ticks (void)
 {
 	ulong now = GPTCNT; /* current tick value */

+ 7 - 7
arch/arm/cpu/arm1136/omap24xx/timer.c

@@ -41,6 +41,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static void reset_timer_masked (void)
+{
+	/* reset time */
+	gd->lastinc = READ_TIMER;	/* capture current incrementer value time */
+	gd->tbl = 0;			/* start "advancing" time stamp from 0 */
+}
+
 int timer_init (void)
 {
 	int32_t val;
@@ -85,13 +92,6 @@ void __udelay (unsigned long usec)
 		/*NOP*/;
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	gd->lastinc = READ_TIMER;	/* capture current incrementer value time */
-	gd->tbl = 0;			/* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked (void)
 {
 	ulong now = READ_TIMER;		/* current tick value */

+ 0 - 7
arch/arm/cpu/arm1176/s3c64xx/timer.c

@@ -135,13 +135,6 @@ ulong get_tbclk(void)
 	return (ulong)(timer_load_val / 100);
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = read_timer();
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	unsigned long long res = get_ticks();

+ 0 - 7
arch/arm/cpu/arm720t/interrupts.c

@@ -233,13 +233,6 @@ void __udelay (unsigned long usec)
 #endif
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	lastdec = READ_TIMER;
-	timestamp = 0;
-}
-
 ulong get_timer_masked (void)
 {
 	ulong now = READ_TIMER;

+ 0 - 8
arch/arm/cpu/arm920t/at91/timer.c

@@ -82,14 +82,6 @@ void __udelay(unsigned long usec)
 	udelay_masked(usec);
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
-	gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
-	gd->tbl = 0;
-}
-
 ulong get_timer_raw(void)
 {
 	at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;

+ 0 - 7
arch/arm/cpu/arm920t/at91rm9200/timer.c

@@ -81,13 +81,6 @@ void __udelay (unsigned long usec)
 	udelay_masked(usec);
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	lastinc = READ_TIMER;
-	timestamp = 0;
-}
-
 ulong get_timer_raw (void)
 {
 	ulong now = READ_TIMER;

+ 3 - 7
arch/arm/cpu/arm920t/ep93xx/timer.c

@@ -91,12 +91,6 @@ unsigned long get_timer(unsigned long base)
 	return get_timer_masked() - base;
 }
 
-void reset_timer_masked(void)
-{
-	read_timer();
-	timer.ticks = 0;
-}
-
 void __udelay(unsigned long usec)
 {
 	unsigned long long target;
@@ -123,7 +117,9 @@ int timer_init(void)
 	writel(TIMER_ENABLE | TIMER_CLKSEL,
 		&timer_regs->timer3.control);
 
-	reset_timer_masked();
+	/* Reset the timer */
+	read_timer();
+	timer.ticks = 0;
 
 	return 0;
 }

+ 3 - 7
arch/arm/cpu/arm920t/imx/timer.c

@@ -43,7 +43,9 @@ int timer_init (void)
 	TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */
 	TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */
 
-	reset_timer_masked();
+	/* Reset the timer */
+	TCTL1 &= ~TCTL_TEN;
+	TCTL1 |= TCTL_TEN; /* Enable timer */
 
 	return (0);
 }
@@ -56,12 +58,6 @@ ulong get_timer (ulong base)
 	return get_timer_masked() - base;
 }
 
-void reset_timer_masked (void)
-{
-	TCTL1 &= ~TCTL_TEN;
-	TCTL1 |= TCTL_TEN; /* Enable timer */
-}
-
 ulong get_timer_masked (void)
 {
 	return TCN1;

+ 5 - 10
arch/arm/cpu/arm920t/ks8695/timer.c

@@ -33,7 +33,11 @@ ulong timer_ticks;
 
 int timer_init (void)
 {
-	reset_timer_masked();
+	/* Set the hadware timer for 1ms */
+	ks8695_write(KS8695_TIMER1, TIMER_COUNT);
+	ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
+	ks8695_write(KS8695_TIMER_CTRL, 0x2);
+	timer_ticks = 0;
 
 	return 0;
 }
@@ -46,15 +50,6 @@ int timer_init (void)
 #define	TIMER_COUNT	(TIMER_INTERVAL / 2)
 #define	TIMER_PULSE	TIMER_COUNT
 
-void reset_timer_masked(void)
-{
-	/* Set the hadware timer for 1ms */
-	ks8695_write(KS8695_TIMER1, TIMER_COUNT);
-	ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
-	ks8695_write(KS8695_TIMER_CTRL, 0x2);
-	timer_ticks = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	/* Check for timer wrap */

+ 0 - 7
arch/arm/cpu/arm920t/s3c24x0/timer.c

@@ -101,13 +101,6 @@ void __udelay (unsigned long usec)
 		/*NOP*/;
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = READ_TIMER();
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong tmr = get_ticks();

+ 3 - 9
arch/arm/cpu/arm925t/timer.c

@@ -56,7 +56,9 @@ int timer_init (void)
 		CONFIG_SYS_TIMERBASE + CNTL_TIMER);
 
 	/* init the timestamp and lastdec value */
-	reset_timer_masked();
+	lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /
+			(TIMER_CLOCK / CONFIG_SYS_HZ);
+	timestamp = 0;	       /* start "advancing" time stamp from 0 */
 
 	return 0;
 }
@@ -85,14 +87,6 @@ void __udelay (unsigned long usec)
 	}
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /
-			(TIMER_CLOCK / CONFIG_SYS_HZ);
-	timestamp = 0;	       /* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked (void)
 {
 	uint32_t now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /

+ 2 - 8
arch/arm/cpu/arm926ejs/armada100/timer.c

@@ -77,13 +77,6 @@ ulong read_timer(void)
 	return(readl(&armd1timers->cvwr));
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	gd->tbl = read_timer();
-	gd->tbu = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = read_timer();
@@ -142,7 +135,8 @@ int timer_init(void)
 	/* Enable timer 0 */
 	writel(0x1, &armd1timers->cer);
 	/* init the gd->tbu and gd->tbl value */
-	reset_timer_masked();
+	gd->tbl = read_timer();
+	gd->tbu = 0;
 
 	return 0;
 }

+ 2 - 8
arch/arm/cpu/arm926ejs/kirkwood/timer.c

@@ -88,13 +88,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define timestamp gd->tbl
 #define lastdec gd->lastinc
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = READ_TIMER;
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = READ_TIMER;
@@ -154,7 +147,8 @@ int timer_init(void)
 	writel(cntmrctrl, CNTMR_CTRL_REG);
 
 	/* init the timestamp and lastdec value */
-	reset_timer_masked();
+	lastdec = READ_TIMER;
+	timestamp = 0;
 
 	return 0;
 }

+ 3 - 11
arch/arm/cpu/arm926ejs/mb86r0x/timer.c

@@ -68,7 +68,9 @@ int timer_init(void)
 
 	writel(ctrl, &timer->control);
 
-	reset_timer_masked();
+	/* capture current value time */
+	lastdec = readl(&timer->value);
+	timestamp = 0; /* start "advancing" time stamp from 0 */
 
 	return 0;
 }
@@ -94,16 +96,6 @@ unsigned long long get_ticks(void)
 	return timestamp;
 }
 
-void reset_timer_masked(void)
-{
-	struct mb86r0x_timer * timer = (struct mb86r0x_timer *)
-					MB86R0x_TIMER_BASE;
-
-	/* capture current value time */
-	lastdec = readl(&timer->value);
-	timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked(void)
 {
 	return tick_to_time(get_ticks());

+ 0 - 9
arch/arm/cpu/arm926ejs/mx25/timer.c

@@ -121,15 +121,6 @@ int timer_init(void)
 	return 0;
 }
 
-void reset_timer_masked(void)
-{
-	struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
-	/* reset time */
-	/* capture current incrementer value time */
-	lastinc = readl(&gpt->counter);
-	timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
 unsigned long long get_ticks (void)
 {
 	struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;

+ 0 - 9
arch/arm/cpu/arm926ejs/mx27/timer.c

@@ -124,15 +124,6 @@ int timer_init(void)
 	return 0;
 }
 
-void reset_timer_masked(void)
-{
-	struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
-	/* reset time */
-	/* capture current incrementer value time */
-	lastinc = readl(&regs->gpt_tcn);
-	timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
 unsigned long long get_ticks (void)
 {
 	struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;

+ 2 - 8
arch/arm/cpu/arm926ejs/orion5x/timer.c

@@ -95,13 +95,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define timestamp gd->tbl
 #define lastdec gd->lastinc
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = read_timer();
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = read_timer();
@@ -171,5 +164,6 @@ int timer_init(void)
 void timer_init_r(void)
 {
 	/* init the timestamp and lastdec value */
-	reset_timer_masked();
+	lastdec = read_timer();
+	timestamp = 0;
 }

+ 2 - 8
arch/arm/cpu/arm926ejs/pantheon/timer.c

@@ -85,13 +85,6 @@ ulong read_timer(void)
 	return val;
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	gd->tbl = read_timer();
-	gd->tbu = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = read_timer();
@@ -151,7 +144,8 @@ int timer_init(void)
 	/* Enable timer 0 */
 	writel(0x1, &panthtimers->cer);
 	/* init the gd->tbu and gd->tbl value */
-	reset_timer_masked();
+	gd->tbl = read_timer();
+	gd->tbu = 0;
 
 	return 0;
 }

+ 3 - 8
arch/arm/cpu/arm926ejs/spear/timer.c

@@ -68,7 +68,9 @@ int timer_init(void)
 	/* auto reload, start timer */
 	writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
 
-	reset_timer_masked();
+	/* Reset the timer */
+	lastdec = READ_TIMER();
+	timestamp = 0;
 
 	return 0;
 }
@@ -97,13 +99,6 @@ void __udelay(unsigned long usec)
 		;
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = READ_TIMER();
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = READ_TIMER();

+ 4 - 6
arch/arm/cpu/armv7/mx5/timer.c

@@ -52,6 +52,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int timer_init(void)
 {
 	int i;
+	ulong val;
 
 	/* setup GP Timer 1 */
 	__raw_writel(GPTCR_SWR, &cur_gpt->control);
@@ -65,15 +66,12 @@ int timer_init(void)
 	/* Freerun Mode, PERCLK1 input */
 	i = __raw_readl(&cur_gpt->control);
 	__raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
-	reset_timer_masked();
-	return 0;
-}
 
-void reset_timer_masked(void)
-{
-	ulong val = __raw_readl(&cur_gpt->counter);
+	val = __raw_readl(&cur_gpt->counter);
 	lastinc = val / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ);
 	timestamp = 0;
+
+	return 0;
 }
 
 ulong get_timer_masked(void)

+ 3 - 8
arch/arm/cpu/armv7/omap-common/timer.c

@@ -55,7 +55,9 @@ int timer_init(void)
 	writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST,
 		&timer_base->tclr);
 
-	reset_timer_masked();	/* init the timestamp and lastinc value */
+	/* reset time, capture current incrementer value time */
+	gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
+	gd->tbl = 0;		/* start "advancing" time stamp from 0 */
 
 	return 0;
 }
@@ -84,13 +86,6 @@ void __udelay(unsigned long usec)
 	}
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time, capture current incrementer value time */
-	gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
-	gd->tbl = 0;		/* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked(void)
 {
 	/* current tick value */

+ 0 - 7
arch/arm/cpu/armv7/tegra2/timer.c

@@ -69,13 +69,6 @@ void __udelay(unsigned long usec)
 	}
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time, capture current incrementer value time */
-	gd->lastinc = readl(&timer_base->cntr_1us) / (TIMER_CLK/CONFIG_SYS_HZ);
-	gd->tbl = 0;		/* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now;

+ 1 - 7
arch/arm/cpu/pxa/timer.c

@@ -59,7 +59,7 @@ static inline unsigned long long us_to_tick(unsigned long long us)
 
 int timer_init (void)
 {
-	reset_timer_masked();
+	writel(0, OSCR);
 
 	return 0;
 }
@@ -74,12 +74,6 @@ void __udelay (unsigned long usec)
 	udelay_masked (usec);
 }
 
-
-void reset_timer_masked (void)
-{
-	writel(0, OSCR);
-}
-
 ulong get_timer_masked (void)
 {
 	return tick_to_time(get_ticks());

+ 0 - 7
arch/arm/cpu/s3c44b0/timer.c

@@ -78,13 +78,6 @@ void __udelay (unsigned long usec)
 		/*NOP*/;
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	lastdec = READ_TIMER;
-	timestamp = 0;
-}
-
 ulong get_timer_masked (void)
 {
 	ulong now = READ_TIMER;

+ 0 - 6
arch/arm/cpu/sa1100/timer.c

@@ -44,12 +44,6 @@ void __udelay (unsigned long usec)
 	udelay_masked (usec);
 }
 
-
-void reset_timer_masked (void)
-{
-	OSCR = 0;
-}
-
 ulong get_timer_masked (void)
 {
 	return OSCR;

+ 4 - 9
board/armltd/integrator/timer.c

@@ -95,7 +95,10 @@ int timer_init (void)
 
 	/* init the timestamp */
 	total_count = 0ULL;
-	reset_timer_masked();
+	/* capure current decrementer value    */
+	lastdec	  = READ_TIMER;
+	/* start "advancing" time stamp from 0 */
+	timestamp = 0L;
 
 	div_timer = CONFIG_SYS_HZ_CLOCK;
 	do_div(div_timer, CONFIG_SYS_HZ);
@@ -129,14 +132,6 @@ void __udelay (unsigned long usec)
 	}
 }
 
-void reset_timer_masked (void)
-{
-	/* capure current decrementer value    */
-	lastdec	  = READ_TIMER;
-	/* start "advancing" time stamp from 0 */
-	timestamp = 0L;
-}
-
 /* converts the timer reading to U-Boot ticks	       */
 /* the timestamp is the number of ticks since reset    */
 ulong get_timer_masked (void)