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@@ -18,6 +18,11 @@
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DECLARE_GLOBAL_DATA_PTR;
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+struct tegra_mmc_plat {
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+ struct mmc_config cfg;
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+ struct mmc mmc;
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+};
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+
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struct tegra_mmc_priv {
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struct tegra_mmc *reg;
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struct reset_ctl reset_ctl;
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@@ -27,8 +32,6 @@ struct tegra_mmc_priv {
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struct gpio_desc wp_gpio; /* Write Protect GPIO */
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unsigned int version; /* SDHCI spec. version */
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unsigned int clock; /* Current clock (MHz) */
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- struct mmc_config cfg; /* mmc configuration */
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- struct mmc *mmc;
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};
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static void tegra_mmc_set_power(struct tegra_mmc_priv *priv,
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@@ -151,11 +154,11 @@ static int tegra_mmc_wait_inhibit(struct tegra_mmc_priv *priv,
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return 0;
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}
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-static int tegra_mmc_send_cmd_bounced(struct mmc *mmc, struct mmc_cmd *cmd,
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+static int tegra_mmc_send_cmd_bounced(struct udevice *dev, struct mmc_cmd *cmd,
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struct mmc_data *data,
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struct bounce_buffer *bbstate)
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{
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- struct tegra_mmc_priv *priv = mmc->priv;
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+ struct tegra_mmc_priv *priv = dev_get_priv(dev);
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int flags, i;
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int result;
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unsigned int mask = 0;
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@@ -324,7 +327,7 @@ static int tegra_mmc_send_cmd_bounced(struct mmc *mmc, struct mmc_cmd *cmd,
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return 0;
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}
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-static int tegra_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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+static int tegra_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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void *buf;
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@@ -346,7 +349,7 @@ static int tegra_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
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bounce_buffer_start(&bbstate, buf, len, bbflags);
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}
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- ret = tegra_mmc_send_cmd_bounced(mmc, cmd, data, &bbstate);
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+ ret = tegra_mmc_send_cmd_bounced(dev, cmd, data, &bbstate);
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if (data)
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bounce_buffer_stop(&bbstate);
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@@ -408,9 +411,10 @@ out:
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priv->clock = clock;
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}
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-static int tegra_mmc_set_ios(struct mmc *mmc)
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+static int tegra_mmc_set_ios(struct udevice *dev)
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{
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- struct tegra_mmc_priv *priv = mmc->priv;
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+ struct tegra_mmc_priv *priv = dev_get_priv(dev);
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+ struct mmc *mmc = mmc_get_mmc_dev(dev);
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unsigned char ctrl;
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debug(" mmc_set_ios called\n");
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@@ -505,9 +509,10 @@ static void tegra_mmc_reset(struct tegra_mmc_priv *priv, struct mmc *mmc)
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tegra_mmc_pad_init(priv);
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}
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-static int tegra_mmc_init(struct mmc *mmc)
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+static int tegra_mmc_init(struct udevice *dev)
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{
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- struct tegra_mmc_priv *priv = mmc->priv;
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+ struct tegra_mmc_priv *priv = dev_get_priv(dev);
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+ struct mmc *mmc = mmc_get_mmc_dev(dev);
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unsigned int mask;
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debug(" tegra_mmc_init called\n");
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@@ -566,9 +571,9 @@ static int tegra_mmc_init(struct mmc *mmc)
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return 0;
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}
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-static int tegra_mmc_getcd(struct mmc *mmc)
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+static int tegra_mmc_getcd(struct udevice *dev)
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{
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- struct tegra_mmc_priv *priv = mmc->priv;
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+ struct tegra_mmc_priv *priv = dev_get_priv(dev);
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debug("tegra_mmc_getcd called\n");
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@@ -578,32 +583,32 @@ static int tegra_mmc_getcd(struct mmc *mmc)
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return 1;
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}
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-static const struct mmc_ops tegra_mmc_ops = {
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+static const struct dm_mmc_ops tegra_mmc_ops = {
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.send_cmd = tegra_mmc_send_cmd,
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.set_ios = tegra_mmc_set_ios,
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- .init = tegra_mmc_init,
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- .getcd = tegra_mmc_getcd,
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+ .get_cd = tegra_mmc_getcd,
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};
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static int tegra_mmc_probe(struct udevice *dev)
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{
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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+ struct tegra_mmc_plat *plat = dev_get_platdata(dev);
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struct tegra_mmc_priv *priv = dev_get_priv(dev);
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+ struct mmc_config *cfg = &plat->cfg;
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int bus_width, ret;
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- priv->cfg.name = "Tegra SD/MMC";
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- priv->cfg.ops = &tegra_mmc_ops;
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+ cfg->name = dev->name;
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bus_width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
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"bus-width", 1);
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- priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
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- priv->cfg.host_caps = 0;
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+ cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
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+ cfg->host_caps = 0;
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if (bus_width == 8)
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- priv->cfg.host_caps |= MMC_MODE_8BIT;
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+ cfg->host_caps |= MMC_MODE_8BIT;
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if (bus_width >= 4)
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- priv->cfg.host_caps |= MMC_MODE_4BIT;
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- priv->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
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+ cfg->host_caps |= MMC_MODE_4BIT;
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+ cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
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/*
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* min freq is for card identification, and is the highest
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@@ -611,10 +616,10 @@ static int tegra_mmc_probe(struct udevice *dev)
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* max freq is highest HS eMMC clock as per the SD/MMC spec
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* (actually 52MHz)
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*/
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- priv->cfg.f_min = 375000;
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- priv->cfg.f_max = 48000000;
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+ cfg->f_min = 375000;
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+ cfg->f_max = 48000000;
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- priv->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
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+ cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
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priv->reg = (void *)devfdt_get_addr(dev);
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@@ -652,14 +657,16 @@ static int tegra_mmc_probe(struct udevice *dev)
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if (dm_gpio_is_valid(&priv->pwr_gpio))
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dm_gpio_set_value(&priv->pwr_gpio, 1);
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- priv->mmc = mmc_create(&priv->cfg, priv);
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- if (priv->mmc == NULL)
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- return -1;
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+ upriv->mmc = &plat->mmc;
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- priv->mmc->dev = dev;
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- upriv->mmc = priv->mmc;
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+ return tegra_mmc_init(dev);
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+}
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- return 0;
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+static int tegra_mmc_bind(struct udevice *dev)
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+{
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+ struct tegra_mmc_plat *plat = dev_get_platdata(dev);
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+
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+ return mmc_bind(dev, &plat->mmc, &plat->cfg);
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}
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static const struct udevice_id tegra_mmc_ids[] = {
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@@ -676,6 +683,9 @@ U_BOOT_DRIVER(tegra_mmc_drv) = {
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.name = "tegra_mmc",
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.id = UCLASS_MMC,
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.of_match = tegra_mmc_ids,
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+ .bind = tegra_mmc_bind,
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.probe = tegra_mmc_probe,
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+ .ops = &tegra_mmc_ops,
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+ .platdata_auto_alloc_size = sizeof(struct tegra_mmc_plat),
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.priv_auto_alloc_size = sizeof(struct tegra_mmc_priv),
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};
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